MT29C4G48MAZAPAKD-5 IT Micron Technology Inc, MT29C4G48MAZAPAKD-5 IT Datasheet - Page 161

• Manufacturer Part Number: MT29C4G48MAZAPAKD-5 IT
• Description: MICMT29C4G48MAZAPAKD-5_IT 4G+2G MCP
• Manufacturer: Micron Technology Inc

Figure 108: PRECHARGE Command
BURST TERMINATE
AUTO REFRESH
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
Note:
BA0, BA1
The BURST TERMINATE command is used to truncate READ bursts with auto pre-
charge disabled. The most recently registered READ command prior to the BURST
TERMINATE command will be truncated, as described in READ Operation (page 181).
The open page from which the READ was terminated remains open.
AUTO REFRESH is used during normal operation of the device and is analogous to CAS#-
BEFORE-RAS# (CBR) REFRESH in FPM/EDO DRAM. The AUTO REFRESH command is
nonpersistent and must be issued each time a refresh is required.
Addressing is generated by the internal refresh controller. This makes the address bits a
“Don’t Care” during an AUTO REFRESH command.
For improved efficiency in scheduling and switching between tasks, some flexibility in
the absolute refresh interval is provided. The auto refresh period begins when the AU-
TO REFRESH command is registered and ends
Address
1. If A10 is HIGH, bank address becomes “Don’t Care.”
RAS#
CAS#
WE#
CK#
CKE
A10
CS#
CK
HIGH
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
Single bank
All banks
Bank
Don’t Care
161
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t
RFC later.
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Commands