72T7285L4-4BB IDT, Integrated Device Technology Inc, 72T7285L4-4BB Datasheet - Page 5
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72T7285L4-4BB
Manufacturer Part Number
72T7285L4-4BB
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.72T7285L4-4BB.pdf
(53 pages)
Specifications of 72T7285L4-4BB
Configuration
Dual
Density
1.125Mb
Access Time (max)
3.4ns
Word Size
72b
Organization
16Kx72
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
BGA
Clock Freq (max)
225MHz
Operating Supply Voltage (typ)
2.5V
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Supply Current
130mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / Rohs Status
Not Compliant
TABLE 1 — BUS-MATCHING CONFIGURATION MODES
NOTE:
1. Pin status during Master Reset.
16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72
BM
H
H
H
H
L
PROGRAMMABLE ALMOST-FULL (PAF)
FULL FLAG/INPUT READY (FF/IR)
(x72, x36, x18) DATA IN (D
FIRST WORD FALL THROUGH/
WRITE CHIP SELECT (WCS)
WRITE CLOCK (WCLK/WR)
SERIAL INPUT (FWFT/SI)
SERIAL CLOCK (SCLK)
WRITE ENABLE (WEN)
SERIAL ENABLE(SEN)
I W
H
H
L
L
L
Figure 1. Single Device Configuration Signal Flow Diagram
PARTIAL RESET (PRS)
INPUT WIDTH (IW)
LOAD (LD)
0
- D
n
)
OW
H
H
L
L
L
MATCHING
72T72105
72T72115
72T7285
72T7295
(BM)
BUS-
IDT
5
MASTER RESET (MRS)
OUTPUT WIDTH (OW)
REN ECHO, EREN
RCLK ECHO, ERCLK
RETRANSMIT (RT)
PROGRAMMABLE ALMOST-EMPTY (PAE)
READ CLOCK (RCLK/RD)
READ ENABLE (REN)
(x72, x36, x18) DATA OUT (Q
MARK
EMPTY FLAG/OUTPUT READY (EF/OR)
HALF-FULL FLAG (HF)
BIG-ENDIAN/LITTLE-ENDIAN (BE)
INTERSPERSED/
NON-INTERSPERSED PARITY (IP)
OUTPUT ENABLE (OE)
READ CHIP SELECT (RCS)
Write Port Width
x72
x72
x72
x36
x18
COMMERCIAL AND INDUSTRIAL
0
- Q
TEMPERATURE RANGES
Read Port Width
n
)
5994 drw03
x72
x36
x18
x72
x72