82V1068PF8 IDT, Integrated Device Technology Inc, 82V1068PF8 Datasheet - Page 19
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82V1068PF8
Manufacturer Part Number
82V1068PF8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V1068PF8.pdf
(56 pages)
Specifications of 82V1068PF8
Single Supply Voltage (typ)
3.3V
Single Supply Voltage (min)
3.135V
Single Supply Voltage (max)
3.6V
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant
IDT82V1068 OCTAL PROGRAMMABLE PCM CODEC
Abbreviation List
LPF/AA: Anti-Alias Low-pass Filter
LPF/SC: Smoothing Low-pass Filter
LPF: Low-pass Filter
HPF: High-pass Filter
GIS: Gain for Impedance Scaling
D1: 1st Down Sample Stage
D2: 2nd Down Sample Stage
U1: 1st Up Sample Stage
U2: 2nd Up Sample Stage
UF: Up Sampling Filter (64k-128k)
VOUT
VIN
Command 26
Command 2
Command 3
These loopbacks and receive PCM cutoff are controlled by Global Command 26, Local Command 1 and Local Command 2 as shown in the following. Once its corresponding bit in the command
is set to 1, the loopback will be enabled.
Global
Local
Local
Analog
LPF/AA
LPF/SC
Local Command1:CS[2]
1 = enable(normal)
0 = disable(cut)
ALB_64k
MSB
MSB
MSB
IE[3]
∑
−
∆
∑
@2MHz
−
∆
PLLPD
IE[2]
GIS
Local Command1:CS[0]
1 = enable(normal)
0 = disable(cut)
U1
DLB_64k
IE[1]
D1
UF
Figure 9 Signal Flow for Each Channel
@64KHz
DLB_ANA
Reserved
IMF
IE[0]
Transmit Path
Receive Path
ECF
Local Command1:CS[1]
1 = enable(normal)
0 = disable(cut)
GRX
GTX
CUTOFF
ALB_8k
19
IMF: Impedance Matching Filter
ECF: Echo Cancellation Filter
GTX: Gain for Transmit Path
GRX: Gain for Receive Path
FRX: Frequency Response Correction for Transmit
FRR: Frequency Response Correction for Receive
CMP: Compression
EXP: Expansion
TSA: Time slot Assignment
U2
D2
DLB_PCM
@16KHz
LPF
DLB_8k
LPF
FRX
FRR
ALB_1BIT
DLB_DI
@8KHz
FSK
Local Command1:CS[3]
1 = enable(normal)
0 = disable(Bypass)
INDUSTRIAL TEMPERATURE RANGE
HPF
DLB_1BIT
ALB_PCM
Bold Black Framed:
Programmable Filters
Fine Black Framed:
Fixed Filters
ALB_DI
LSB
LSB
LSB
Dual tone
Level meter
CMP
CUT-OFF-PCM
EXP
TS
TSA
TSA
PCM
Highway
DR1/DR2
DX1/DX2