IDT82V3285DQGT IDT, Integrated Device Technology Inc, IDT82V3285DQGT Datasheet - Page 99

• Manufacturer Part Number: IDT82V3285DQGT
• Description: IC PLL WAN STRATUM 100-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3285DQGT

• Input: CMOS, LVDS, PECL, TTL
• Output: CMOS, LVDS, PECL, TTL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: 622.08MHz
• Function: Wan PLL
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: TQFP
• Pin Count: 100
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3285DQGT

T0_INPUT_SEL_CNFG - T0 Selected Input Clock Configuration
Programming Information
IDT82V3285
Address: 50H
Type: Read / Write
Default Value: XXXX0000
7 - 4
3 - 0
Bit
7
-
T0_INPUT_SEL[3:0]
Name
-
6
-
Reserved.
This bit determines T0 input clock selection. It is valid only when the EXT_SW bit (b4, 0BH) is ‘0’.
0000: Automatic selection. (default)
0001, 0010: Reserved.
0011: Forced selection - IN1 is selected.
0100: Forced selection - IN2 is selected.
0101: Forced selection - IN3 is selected.
0110: Forced selection - IN4 is selected.
0111, 1000, 1001, 1010: Reserved.
1011: Forced selection - IN5 is selected.
1100, 1101, 1110, 1111: Reserved.
5
-
4
-
T0_INPUT_SEL3
99
3
Description
T0_INPUT_SEL2
2
T0_INPUT_SEL1
1
T0_INPUT_SEL0
April 11, 2007
0
WAN PLL