IDT82V3285DQGT IDT, Integrated Device Technology Inc, IDT82V3285DQGT Datasheet - Page 92

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IDT82V3285DQGT

Manufacturer Part Number
IDT82V3285DQGT
Description
IC PLL WAN STRATUM 100-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
PLL Clock Generatorr
Datasheet

Specifications of IDT82V3285DQGT

Input
CMOS, LVDS, PECL, TTL
Output
CMOS, LVDS, PECL, TTL
Frequency - Max
622.08MHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Frequency-max
622.08MHz
Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
100
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
82V3285DQGT
IN_FREQ_READ_STS - Input Clock Frequency Read Value
Programming Information
IDT82V3285
Address: 42H
Type: Read
Default Value: 00000000
IN_FREQ_VAL
7 - 0
Bit
UE7
7
IN_FREQ_VALUE[7:0]
IN_FREQ_VAL
Name
UE6
6
These bits represent a 2’s complement signed integer. If the value is multiplied by the value in the
FREQ_MON_FACTOR[3:0] bits (b3~0, 2EH), the frequency of an input clock with respect to the reference clock in ppm will
be gotten. The input clock is selected by the IN_FREQ_READ_CH[3:0] bits (b3~0, 41H).
The value in these bits is updated every 16 seconds, starting when an input clock is selected.
IN_FREQ_VAL
UE5
5
IN_FREQ_VAL
UE4
4
92
IN_FREQ_VAL
UE3
3
Description
IN_FREQ_VAL
UE2
2
IN_FREQ_VAL
UE1
1
IN_FREQ_VAL
April 11, 2007
UE0
0
WAN PLL

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