ICS8624BYLF IDT, Integrated Device Technology Inc, ICS8624BYLF Datasheet - Page 11

IC BUFFER ZD 1-5 HSTL 32-LQFP

ICS8624BYLF

Manufacturer Part Number
ICS8624BYLF
Description
IC BUFFER ZD 1-5 HSTL 32-LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Fanout Distribution, Multiplexer , Zero Delay Bufferr
Datasheet

Specifications of ICS8624BYLF

Pll
Yes with Bypass
Input
HCSL, LVDS, LVHSTL, LVPECL, SSTL
Output
HSTL
Number Of Circuits
1
Ratio - Input:output
2:5
Differential - Input:output
Yes/Yes
Frequency - Max
700MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-LQFP
Frequency-max
700MHz
Number Of Elements
1
Supply Current
120mA
Pll Input Freq (min)
31.25MHz
Pll Input Freq (max)
700MHz
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
LQFP
Output Frequency Range
Up to 700MHz
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Commercial
Pin Count
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
8624BYLF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS8624BYLF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
ICS8624BYLF
Manufacturer:
ICS
Quantity:
20 000
Part Number:
ICS8624BYLFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Schematic Example
The schematic of the ICS8624 layout example is shown in Figure 4A.
The ICS8624 recommended PCB board layout for this example is
shown in Figure 4B. This layout example is used as a general
Figure 4A. ICS8624 HSTL Zero Delay Buffer Schematic Example
ICS8624 Data Sheet
ICS8624BY REVISION E OCTOBER 6, 2009
VDD
RU2
SP
RD2
1K
3.3V
3.3V PECL Driver
RU3
1K
RD3
SP
RU4
1K
RD4
SP
Zo = 50 Ohm
Zo = 50 Ohm
(155.5 MHz)
RU5
SP
RD5
1K
CLK_SEL
PLL_SEL
SEL0
SEL1
SP = Spare (i.e. not installed)
SP = Space (i.e. not intstalled)
R8
50
R10
50
VDD=3.3V
VDDO=1.8V
DIV_SEL[1:0] = 01
R9
50
SEL0
SEL1
CLK_SEL
VDD
8624
1
2
3
4
5
6
7
8
U1
SEL0
SEL1
CLK0
nCLK0
CLK1
nCLK2
CLK_SEL
MR
R2B
50
VDDA
0.01u
R2A
50
C11
VDDO
VDDO
nQ3
nQ2
nQ1
11
Q3
Q2
Q1
VDDO
guideline. The layout in the actual system will depend on the selected
component types, the density of the components, the density of the
traces, and the stack up of the P.C. board.
24
23
22
21
20
19
18
17
10u
C16
10
R7
155.5 MHz
LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-HSTL ZERO DELAY BUFFER
VDD
Bypass capacitor located near the power pins
(U1-16)
(U1-9)
0.1uF
C2
0.1uF
C1
Zo = 50 Ohm
Zo = 50 Ohm
VDD
VDDO
(U1-32)
(U1-17)
0.1uF
C6
©2009 Integrated Device Technology, Inc.
0.1uF
C4
R4A
50
(U1-24)
R4B
50
+
-
0.1uF
C5
(U1-25)
LVHSTL_input
0.1uF
C7

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