74HCT4046AD,112 NXP Semiconductors, 74HCT4046AD,112 Datasheet - Page 21

IC PHASE LOCK LOOP W/VCO 16SOIC

74HCT4046AD,112

Manufacturer Part Number
74HCT4046AD,112
Description
IC PHASE LOCK LOOP W/VCO 16SOIC
Manufacturer
NXP Semiconductors
Type
Phase Lock Loop (PLL)r
Series
74HCTr
Datasheet

Specifications of 74HCT4046AD,112

Number Of Circuits
1
Package / Case
16-SOIC (3.9mm Width)
Pll
Yes
Input
Clock
Output
Clock
Ratio - Input:output
2:3
Differential - Input:output
No/No
Frequency - Max
19MHz
Divider/multiplier
No/No
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Frequency-max
19MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Input Level
CMOS
Mounting Style
SMD/SMT
Operating Supply Voltage
4.5 V to 5.5 V
Output Level
CMOS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1547-5
74HCT4046AD
933809570112
book, halfpage
(%)
f
25
20
15
10
10
15
20
25
To obtain optimum temperature stability, C1 must be as small as possible but larger than 100 pF.
Fig.18 Frequency stability of the VCO as a function of ambient temperature with supply voltage as a parameter.
5
0
5
50
In (b), the frequency stability for R1 = R2 = 10 k at 5 V is also given (curve A). This curve is set by the total VCO bias current, and is
not simply the addition of the two 10 k stability curves. C1 = 100 pF; V
0
with offset
without offset (R2 = ): (a) R1 = 3 k ; (b) R1 = 10 k ; (c) R1 = 300 k .
(a)
50
V
CC
=
(R1 = ): (a) R2 = 3 k ; (b) R2 = 10 k ; (c) R2 = 300 k .
6 V
100
5 V
T amb (
3 V
4.5 V
3 V
MSB710
5 V
6 V
o
C)
150
handbook, halfpage
(%)
f
25
20
15
10
10
15
20
25
5
0
5
50
0
(b)
5 V
6 V
50
3 V
VCO IN
100
T
amb
V
CC
= 0.5 V
MSB711
3 V
5 V
6 V
( C)
A
=
o
150
CC
handbook, halfpage
.
(%)
f
25
20
15
10
10
15
20
25
5
0
5
50
0
(c)
50
6 V
V
5 V
CC
3 V
=
100
T
amb
MSB712
5 V
6 V
3 V
( C)
o
150

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