74HCT4046AD,112 NXP Semiconductors, 74HCT4046AD,112 Datasheet - Page 17

• Manufacturer Part Number: 74HCT4046AD,112
• Description: IC PHASE LOCK LOOP W/VCO 16SOIC
• Manufacturer: NXP Semiconductors
• Type: Phase Lock Loop (PLL)r
• Series: 74HCTr

Specifications of 74HCT4046AD,112

• Number Of Circuits: 1
• Package / Case: 16-SOIC (3.9mm Width)
• Pll: Yes
• Input: Clock
• Output: Clock
• Ratio - Input:output: 2:3
• Differential - Input:output: No/No
• Frequency - Max: 19MHz
• Divider/multiplier: No/No
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Frequency-max: 19MHz
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Input Level: CMOS
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 4.5 V to 5.5 V
• Output Level: CMOS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1547-5; 74HCT4046AD; 933809570112

Philips Semiconductors
DC CHARACTERISTICS FOR 74HCT
Demodulator section
Voltages are referenced to GND (ground = 0 V)
AC CHARACTERISTICS FOR 74HCT
Phase comparator section
GND = 0 V; t
1997 Nov 25
SYMBOL PARAMETER
R
V
R
SYMBOL PARAMETER
t
t
t
t
t
t
t
t
PHL
PLH
PHL
PLH
PHL
PLH
PZH
PZL
OFF
S
D
Phase-locked-loop with VCO
/
/
/
/
resistor range
offset voltage
VCO
V
dynamic output
resistance at
DEM
r
propagation delay
propagation delay
propagation delay
3-state output enable
= t
SIG
to PC1
SIG
to PCP
SIG
to PC3
time SIG
to PC2
DEMOUT
f
IN
= 6 ns; C
OUT
IN
IN
IN
, COMP
, COMP
, COMP
to
OUT
OUT
OUT
OUT
IN
, COMP
L
IN
IN
IN
= 50 pF
min. typ. max. min. max. min.
50
IN
25
+25
min.
20
300
23
35
28
30
+25
typ.
T
74HCT
amb
40
68
54
56
max. min. max. min. max.
40 to +85
( C)
T
74HCT
17
amb
40 to +85
( C)
40 to +125
50
85
68
70
max.
40 to +125
k
mV
UNIT
60
102
81
84
UNIT
ns
ns
ns
ns
4.5
4.5
4.5
V
(V)
CC
74HC/HCT4046A
TEST CONDITIONS
OTHER
at R
the leakage current can
influence V
V
values taken over
R
V
4.5
4.5
4.5
4.5
V
(V)
I
DEMOUT
S
TEST CONDITIONS
CC
= V
range; see Fig.15
Product specification
S
VCOIN
OTHER
Fig.16
Fig.16
Fig.16
Fig.17
300 k
= 1/2 V
DEMOUT
= 1/2 V
CC
CC
;