74HCT4046AD,112 NXP Semiconductors, 74HCT4046AD,112 Datasheet

IC PHASE LOCK LOOP W/VCO 16SOIC

74HCT4046AD,112

Manufacturer Part Number
74HCT4046AD,112
Description
IC PHASE LOCK LOOP W/VCO 16SOIC
Manufacturer
NXP Semiconductors
Type
Phase Lock Loop (PLL)r
Series
74HCTr
Datasheet

Specifications of 74HCT4046AD,112

Number Of Circuits
1
Package / Case
16-SOIC (3.9mm Width)
Pll
Yes
Input
Clock
Output
Clock
Ratio - Input:output
2:3
Differential - Input:output
No/No
Frequency - Max
19MHz
Divider/multiplier
No/No
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Frequency-max
19MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Input Level
CMOS
Mounting Style
SMD/SMT
Operating Supply Voltage
4.5 V to 5.5 V
Output Level
CMOS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1547-5
74HCT4046AD
933809570112
Product specification
Supersedes data of September 1993
File under Integrated Circuits, IC06
DATA SHEET
74HC/HCT4046A
Phase-locked-loop with VCO
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
INTEGRATED CIRCUITS
1997 Nov 25

Related parts for 74HCT4046AD,112

74HCT4046AD,112 Summary of contents

Page 1

DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT4046A Phase-locked-loop with VCO Product specification Supersedes data of September 1993 File ...

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Philips Semiconductors Phase-locked-loop with VCO FEATURES Low power consumption Centre frequency MHz (typ Choice of three phase comparators: EXCLUSIVE-OR; edge-triggered JK flip-flop; edge-triggered RS flip-flop Excellent VCO frequency linearity VCO-inhibit control for ON/OFF keying ...

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Philips Semiconductors Phase-locked-loop with VCO The frequency capture range (2f frequency range of input signals on which the PLL will lock if it was initially out-of-lock. The frequency lock range ( defined as the frequency range of input ...

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Philips Semiconductors Phase-locked-loop with VCO QUICK REFERENCE DATA GND = amb SYMBOL f VCO centre frequency o C input capacitance (pin power dissipation capacitance per PD package Notes ...

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Philips Semiconductors Phase-locked-loop with VCO PIN DESCRIPTION PIN NO. SYMBOL 1 PCP OUT 2 PC1 OUT 3 COMP IN 4 VCO OUT 5 INH GND 9 VCO IN 10 DEM OUT 11 R ...

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Philips Semiconductors Phase-locked-loop with VCO OUT COMP VCO DEM OUT VCO IN INH (a) (a) ...

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Philips Semiconductors Phase-locked-loop with VCO ---------- - – DEMOUT PC2OUT SIGIN = ( ). DEMOUT SIGIN COMPIN Fig.6 Phase comparator 1: average output voltage versus input phase difference. Fig.7 Typical waveforms for PLL using ...

Page 8

Philips Semiconductors Phase-locked-loop with VCO Fig.9 Typical waveforms for PLL using phase comparator 2, loop locked ---------- - – DEMOUT PC3OUT SIGIN DEMOUT SIGIN COMPIN Fig.10 Phase comparator ...

Page 9

Philips Semiconductors Phase-locked-loop with VCO RECOMMENDED OPERATING CONDITIONS FOR 74HC/HCT SYMBOL PARAMETER V DC supply voltage supply voltage if VCO CC section is not used V DC input voltage range output voltage range O ...

Page 10

Philips Semiconductors Phase-locked-loop with VCO DC CHARACTERISTICS FOR 74HC Quiescent supply current Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER min. typ. max. min. max. min. quiescent supply I current (VCO CC disabled) Phase comparator section Voltages ...

Page 11

Philips Semiconductors Phase-locked-loop with VCO SYM- PARAMETER BOL R input resistance I SIG , COMP IN IN VCO section Voltages are referenced to GND (ground = 0 V) SYM- PARAMETER BOL V HIGH level IH input voltage INH V LOW ...

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Philips Semiconductors Phase-locked-loop with VCO SYM- PARAMETER BOL R resistor range 2 C1 capacitor range V operating voltage VCOIN range at VCO IN Note 1. The parallel value of R1 and R2 should be more than 2 Optimum ...

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Philips Semiconductors Phase-locked-loop with VCO AC CHARACTERISTICS FOR 74HC Phase comparator section GND = ns SYMBOL PARAMETER t / propagation delay PHL t SIG , COMP ...

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Philips Semiconductors Phase-locked-loop with VCO VCO section GND = ns SYMBOL PARAMETER f/T frequency stability with temperature change f VCO centre o frequency (duty factor = ...

Page 15

Philips Semiconductors Phase-locked-loop with VCO DC CHARACTERISTICS FOR 74HCT Phase comparator section Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER V DC coupled IH HIGH level input voltage SIG , COMP coupled IL LOW ...

Page 16

Philips Semiconductors Phase-locked-loop with VCO DC CHARACTERISTICS FOR 74HCT VCO section Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER V HIGH level IH input voltage INH V LOW level IL input voltage INH V HIGH level output ...

Page 17

Philips Semiconductors Phase-locked-loop with VCO DC CHARACTERISTICS FOR 74HCT Demodulator section Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER min. typ. max. min. max. min. R resistor range offset voltage OFF VCO to IN ...

Page 18

Philips Semiconductors Phase-locked-loop with VCO SYMBOL PARAMETER t / 3-state output disable PHZ t time SIG , COMP PLZ IN to PC2 OUT t / output transition time THL t TLH V AC coupled input I (p-p) sensitivity (peak-to-peak value) ...

Page 19

Philips Semiconductors Phase-locked-loop with VCO FIGURE REFERENCES FOR DC CHARACTERISTICS Fig.12 Typical input resistance curve at SIG COMP . IN Fig.14 Input current at SIG 0 self-bias point. I 1997 Nov 25 , Fig.13 Input ...

Page 20

Philips Semiconductors Phase-locked-loop with VCO AC WAVEFORMS ( 50 GND Fig.16 Waveforms showing input (SIG and the output transition times GND ...

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MSB710 25 book, halfpage handbook, halfpage f (%) 4 100 150 ...

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Philips Semiconductors Phase-locked-loop with VCO ( obtain optimum temperature stability, C1 must be as small as possible but larger than 100 pF. 1997 Nov 25 ( ...

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Philips Semiconductors Phase-locked-loop with VCO ( ( 300 obtain optimum temperature stability, C1 must be as small as ...

Page 24

Philips Semiconductors Phase-locked-loop with VCO Fig.20 Definition of VCO frequency linearity 0.5 V over the V for VCO linearity f‘ = -------------- - 0 2 f‘ – linearity = --------------- ...

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Philips Semiconductors Phase-locked-loop with VCO APPLICATION INFORMATION This information is a guide for the approximation of values of external components to be used with the 74HC/HCT4046A in a phase-lock-loop system. References should be made to Figs 29, 30 and 31 ...

Page 26

Philips Semiconductors Phase-locked-loop with VCO PHASE SUBJECT COMPARATOR VCO frequency PC1, PC2 or PC3 with extra offset PC1, PC2 or PC3 PLL conditions PC1 with no signal at PC2 the SIG input IN PC3 1997 Nov 25 DESIGN CONSIDERATIONS VCO ...

Page 27

Philips Semiconductors Phase-locked-loop with VCO PHASE SUBJECT COMPARATOR PLL frequency PC1, PC2 or PC3 capture range PLL locks on PC1 or PC3 harmonics at PC2 centre frequency noise rejection at PC1 signal input PC2 or PC3 AC ripple content PC1 ...

Page 28

Philips Semiconductors Phase-locked-loop with VCO To obtain optimum VCO performance, C1 must be as small as possible but larger than 100 pF. Interpolation for various values of R1 can be easily calculated because a constant R1C1 product will produce almost ...

Page 29

Philips Semiconductors Phase-locked-loop with VCO To obtain optimum VCO performance, C1 must be as small as possible but larger than 100 pF. Interpolation for various values of R2 can be easily calculated because a constant R2C1 product will produce almost ...

Page 30

Philips Semiconductors Phase-locked-loop with VCO Fig.31 Typical frequency lock range ( VCO gain ------------------------------------ - range VCOIN 1997 Nov 25 ) versus the product R1C1 ˙ ...

Page 31

Philips Semiconductors Phase-locked-loop with VCO PLL design example The frequency synthesizer, used in the design example shown in Fig.32, has the following parameters: Output frequency: 2 MHz to 3 MHz frequency steps : 100 kHz settling time : 1 ms ...

Page 32

Philips Semiconductors Phase-locked-loop with VCO note For an extensive description and application example please refer to application note ordering number 9398 649 90011. Also available a computer design program for PLL’s ordering number 9398 961 10061. Since the output frequency ...

Page 33

Philips Semiconductors Phase-locked-loop with VCO SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is ...

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Philips Semiconductors Phase-locked-loop with VCO DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data ...

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