ICS8543BGLF IDT, Integrated Device Technology Inc, ICS8543BGLF Datasheet
ICS8543BGLF
Specifications of ICS8543BGLF
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8543BGLF
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ICS8543BGLF Summary of contents
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Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer General Description The ICS8543 is a low skew, high performance 1-to-4 Differential-to-LVDS Clock Fanout Buffer. Utilizing Low Voltage Differential Signaling (LVDS) the ICS8543 provides a low power, low noise, solution for distributing clock signals ...
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ICS8543 Data Sheet Table 1. Pin Descriptions Number Name GND Power 2 CLK_EN Input 3 CLK_SEL Input 4 CLK Input 5 nCLK Input 6 PCLK Input 7 nPCLK Input 8 OE Input 10 Power DD ...
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ICS8543 Data Sheet Function Tables Table 3A. Control Input Function Table OE CLK_EN After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock ...
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ICS8543 Data Sheet Absolute Maximum Ratings NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those ...
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ICS8543 Data Sheet Table 4C. Differential DC Characteristics, V Symbol Parameter CLK I Input High Current IH nCLK CLK I Input Low Current IL nCLK V Peak-to-Peak Voltage; NOTE 1 PP Common Mode Input Voltage; V CMR NOTE 1, 2 ...
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ICS8543 Data Sheet AC Electrical Characteristics Table 5. AC Characteristics Symbol Parameter f Maximum Output Frequency MAX t Propagation Delay; NOTE 1 PD Buffer Additive Phase Jitter, RMS; tjit refer to Additive Phase Jitter Section tsk(o) Output Skew; ...
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ICS8543 Data Sheet Additive Phase Jitter The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase ...
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ICS8543 Data Sheet Parameter Measurement Information V DD 3.3V±5% POWER SUPPLY LVDS + Float GND – 3.3V LVDS Output Load AC Test Circuit V DD nQ[0:3] V Cross Points OD Q[0: GND Differential Output Level Par t 1 ...
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ICS8543 Data Sheet Parameter Measurement Information, continued nQ[0:3] 80% 20% Q[0: Output Rise/Fall Time V DD LVDS DC Input ➤ Offset Voltage Setup 3.3V±5% POWER SUPPLY LVDS t _ Float GND DC Inpu + High Impedance Leakage Current ...
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ICS8543 Data Sheet Parameter Measurement Information, continued V DD LVDS DC Input Output Short Circuit Current Setup Applications Information Wiring the Differential Input to Accept Single-Ended Levels Figure 2 shows how a differential input can be wired to accept single ...
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ICS8543 Data Sheet 3.3V Differential Clock Input Interface The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both V SWING and V input requirements. Figures show interface CMR examples for the CLK/nCLK input ...
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ICS8543 Data Sheet 3.3V LVPECL Clock Input Interface The PCLK/nPCLK accepts LVPECL, CML, SSTL and other differential signals. Both V and V SWING V input requirements. Figures show interface examples CMR for the PCLK/nPCLK input driven by ...
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ICS8543 Data Sheet Recommendations for Unused Input and Output Pins Inputs: CLK/nCLK I NPUTS For applications not requiring the use of the differential input, both CLK and nCLK can be left floating. Though not required, but for additional protection, a ...
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ICS8543 Data Sheet Power Considerations This section provides information on power dissipation and junction temperature for the ICS8543. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS8543 is the sum of the ...
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ICS8543 Data Sheet Reliability Information Table 7. θ vs. Air Flow Table for a 20 Lead TSSOP JA Linear Feet per Minute Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards Transistor Count The transistor count for ...
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... ICS8543BGLF 8543BGLFT ICS8543BGLF NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use ...
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ICS8543 Data Sheet Revision History Sheet Rev Table Page Description of Change A T4E 5 In the Updated Figure 1, CLK_EN Timing Diagram Updated Figure 1, CLK_EN Timing Diagram. 1 Features section, Bullet 6 to ...
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ICS8543 Data Sheet We’ve Got Your Timing Solution 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to ...