SCANSTA111SM National Semiconductor, SCANSTA111SM Datasheet - Page 9

SCANSTA111SM

Manufacturer Part Number
SCANSTA111SM
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of SCANSTA111SM

Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
FBGA
Rad Hardened
No
Lead Free Status / RoHS Status
Not Compliant

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Register Name
Instruction Register
Boundary-Scan Register
Bypass Register
Device Identification Register
Multi-Cast Group Register
Mode Register
Mode Register
Mode Register
Linear-Feedback Shift Register
TCK Counter Register
Dedicated GPIO Register
Shared GPIO Register
Register Set
The SCANSTA111 includes a number of registers which are
used for 'STA111 selection and configuration, scan data ma-
nipulation, and scan-support operations. These registers can
be grouped as shown in
The specific fields and functions of each of these registers are
detailed in the section of this document titled Data Register
Descriptions.
Note 2: One dedicated and one shared GPIO register exists for each LSP that supports dedicated and/or shared GPIO (maximum of eight shared and eight
dedicated GPIO registers).
Note 3: HDL version only
0
1
2
(0-n)
(0-n)
Table
3.
BSDL Name
INSTRUCTION
BOUNDARY
BYPASS
IDCODE
MCGR
MODE
N/A
MODE2
LFSR
CNTR
N/A
SGPIOn
TABLE 3. Register Descriptions
Description
'STA111 addressing and instruction-decode IEEE Std. 1149.1 required
register
IEEE Std. 1149.1 required register
IEEE Std. 1149.1 required register
IEEE Std. 1149.1 optional register
'STA111-group address assignment
'STA111 local-port configuration and control bits
'STA111 local-port configuration and control bits
'STA111 Shared GPIO configuration bits
'STA111 scan-data compaction (signature generation)
Local-port TCK clock-gating (for BIST)
'STA111 Dedicated GPIO control bits
'STA111 Shared GPIO control bits
9
Note that when any of these registers is selected for insertion
into the 'STA111's scan-chain, scan data enters through that
register's most-significant bit. Similarly, data that is shifted out
of the register is fed to the scan input of the next-downstream
device in the scan-chain.
(Note
3)
(Note
2,
Note
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3)

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