87016AYI IDT, Integrated Device Technology Inc, 87016AYI Datasheet - Page 7

• Manufacturer Part Number: 87016AYI
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Dividerr

Specifications of 87016AYI

• Number Of Clock Inputs: 2
• Output Frequency: 250MHz
• Output Logic Level: LVCMOS/LVTTL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Not Compliant

Table 5C. AC Characteristics, V
All parameters measured at 250MHz unless noted otherwise.
NOTE 1A: Measured from the V
NOTE 1B: Measured from the differential input crossing point to V
NOTE 2: Defined as skew within a bank with equal load conditions.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
NOTE 4: Defined as skew between outputs on different devices operating a the same supply voltages and with equal load conditions.
Using the same type of input on each device, the output is measured at V
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
NOTE 6: This parameter is defined in accordance with JEDEC Standard 65.
Table 5D. AC Characteristics, V
For NOTES, please see above, Table 5C.
IDT™ / ICS™ LVCMOS/LVTTL CLOCK GENERATOR
Parameter
f
tp
tsk(b)
tsk(o)
tsk(pp)
t
odc
t
t
Parameter
f
tp
tsk(b)
tsk(o)
tsk(pp)
t
odc
t
t
MAX
R
EN
DIS
MAX
R
EN
DIS
ICS87016I
LOW SKEW, 1-TO-16 LVCMOS/LVTTL CLOCK GENERATOR
LH
LH
/ t
/ t
F
F
Symbol
Output Frequency
Propagation Delay,
Low to High
Bank Skew; NOTE 2, 6
Output Skew; NOTE 3, 6
Part-to-Part Skew; NOTE 4, 6
Output Rise/Fall Time; NOTE 5
Output Duty Cycle
Output Enable Time; NOTE 5
Output Disable Time; NOTE 5
Symbol
Output Frequency
Propagation Delay,
Low to High
Bank Skew; NOTE 2, 6
Output Skew; NOTE 3, 6
Part-to-Part Skew; NOTE 4, 6
Output Rise/Fall Time; NOTE 5
Output Duty Cycle
Output Enable Time; NOTE 5
Output Disable Time; NOTE 5
DD
/2 of the input to V
CLK0; NOTE 1A
CLK1/CLK1; NOTE 1B
CLK0; NOTE 1A
CLK1/CLK1; NOTE 1B
DD
DD
= 3.3V ± 5%, V
= 3.3V ± 5%, V
DDOX
DDOx
DDOx
/2 of the output.
Measured on the Rising Edge
Measured on the Rising Edge
Measured on the Rising Edge
Measured on the Rising Edge
= 2.5V ± 5%, T
= 1.8V ± 5%, T
DDOX
7
Test Conditions
Test Conditions
/2 of the output.
20% to 80%
20% to 80%
ƒ < 175MHz
ƒ ≥ 175MHz
ƒ < 175MHz
ƒ ≥ 175MHz
DDOX
/2.
A
A
= -40°C to 85°C
= -40°C to 85°C
Minimum Typical Maximum Units
Minimum Typical Maximum Units
200
200
2.9
3.0
3.0
3.0
45
40
45
40
ICS87016AYI REV. C MAY 25, 2007
3.5
3.5
3.9
3.9
DDOX
250
170
800
700
250
170
800
700
4.0
4.0
4.7
4.7
50
55
60
10
10
50
55
60
10
10
/2.
MHz
MHz
ns
ps
ps
ps
ps
ns
ns
ns
ps
ps
ps
ps
ns
ns
ns
ns
%
%
%
%