TSEV83102G0BGL E2V, TSEV83102G0BGL Datasheet - Page 45

• Manufacturer Part Number: TSEV83102G0BGL
• Manufacturer: E2V

Specifications of TSEV83102G0BGL

• Lead Free Status / RoHS Status: Not Compliant

Main Functions of the ADC
Out-of-range Bit
(OR/ORB)
Bit Error Rate (BER)
Gray or Binary Output
Data Format Selection
Pattern Generator
Function
DECB/DIODE:
Junction Temperature
Monitoring and Output
Decimation Enable
2101D–BDC–06/04
The out-of-range bit reaches a logical high state when the input exceeds the positive full-scale
or falls below the negative full-scale. When the analog input exceeds the positive full-scale,
the digital outputs remain at a logical high state with OR/ORB at a logical one. When the ana-
log input falls below the negative full-scale, the digital outputs remain at a logical low state,
with OR/ORB at a logical one again.
The TS83102G0B’s internal regeneration latches indecisions (for inputs very close to the
latches’ threshold). This may produce errors in the logic encoding circuitry, leading to large
amplitude output errors.
This is because the latches regenerate the internal analog residues into logical states with a
finite voltage gain value (Av) within a given positive amount of time D(t): Av = exp (D (t)/t), with
t being the positive regeneration time constant feedback.
The TS83102G0B has been designed to reduce the probability of such errors occuring to
10-12 (measured for the converter at 2 Gsps). A standard technique for reducing the ampli-
tude of such errors down to ±1 LSB consists in setting the digital output data to gray code
format. However, the TS83102G0B has been designed to feature a Bit Error Rate of 10-12
with a binary output format.
To reduce the amplitude of such errors when they occur, it is possible to choose between the
binary or gray output data format by storing gray output codes.
Digital data format selection:
•
•
The pattern generator function (enabled by connecting pin A9 PGEB to V
to rapidly check the ADC’s operation thanks to a checker board pattern delivered internally to
the ADC. Each of the ADC’s output bits should toggle from 0 to 1 successively, giving
sequences such as 0101010101 and 1010101010 every 2 cycles. This function is disabled
when PGEB is left floating or connected to Ground.
The DECB/DIODE pin is provided to enable the decimation function and monitor the die junc-
tion temperature.
When V
ADC, thus reducing the data rate by 32).
When the DECB/DIODE pin is left floating or connected to Ground, then the ADC is said to be
in a "normal" mode of operation (the output data is not decimated) and can be used for die
junction temperature monitoring only.
If you do not intend to use the die junction temperature monitoring function, the DECB/DIODE
pin (A10) has to be left either floating or connected to ground.
The decimation function can be used to debug the ADC at initial stages. This function enables
you to reduce the ADC output rate by 32, thus reducing the time of the ADC’s debug phase at
the maximum speed rate, and is compatible with industrial testing environments.
BINARY output format if B/GB is floating or GND.
GRAY output format if B/GB is connected to V
EE
= -5V, the ADC runs in “decimation by 32” mode (1 out of 32 data is output from the
EE
.
TS83102G0B
EE
= -5V) allows you
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