TSEV83102G0BGL E2V, TSEV83102G0BGL Datasheet - Page 39

• Manufacturer Part Number: TSEV83102G0BGL
• Manufacturer: E2V

Specifications of TSEV83102G0BGL

• Lead Free Status / RoHS Status: Not Compliant

Timing Diagram
Figure 40. TS83102G0B Timing Diagram (2 Gsps Clock Rate) - Data Ready Reset Clock Held at LOW Level
Figure 41. TS83102G0B Timing Diagram (2 Gsps Clock Rate) - Data Ready Reset Clock Held at HIGH Level
2101D–BDC–06/04
V
CLK/CLKB
Digital
Outputs
Data Ready
DR/DRB
Data Ready
Reset
IN
V
CLK/CLKB
Digital
Outputs
Data Ready
DR/DRB
Data Ready
Reset
IN
/V
/V
INB
INB
TDR = 410 ps
TOD = 360 ps
TOD = 360 ps
TDR = 410 ps
TRDR = 1000 ps
1 ns
TRDR = 1000 ps
1 ns
TA = 160 ps
TA = 160 ps
N - 5
N - 5
N
TDR = 410 ps
N
TDR = 410 ps
TPD = 4.0 Clock Periods
N + 1
N - 4
N + 1
TPD = 4.0 Clock Period
N - 4
N + 2
N - 3
N + 2
N - 3
TC = 500 ps
TC1
TC = 500 ps
TC1 TC2
N + 3
N - 2
N + 3
500 ps
500 ps
N - 2
TC2
TOD = 360 ps
N - 1
TOD = 360 ps
N - 1
TD1 = TC1 + TDR - TOD
= TC1 + 50 ps = 300 ps
TD1 = TC1 + TDR - TOD
= TC1 + 50 ps = 300 ps
N
TD2 = TC2 + TOD - TDR
= TC2 - 50 ps = 200 ps
N
TD2 = TC2 + TOD - TDR
= TC2 - 50 ps = 200 ps
N + 1
TS83102G0B
N + 1
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