TSEV83102G0BGL E2V, TSEV83102G0BGL Datasheet - Page 40

• Manufacturer Part Number: TSEV83102G0BGL
• Manufacturer: E2V

Specifications of TSEV83102G0BGL

• Lead Free Status / RoHS Status: Not Compliant

Analog Inputs (VIN/VINB)
Static Issues:
Differential Versus
Single-ended (Full-
scale Inputs)
Dynamic Issues:
Input Impedance and
VSWR
40
TS83102G0B
The ADC’s front-end Track and Hold differential preamplifier has been designed to be entered
either in differential or single-ended mode, up to the maximum operating speed of 2.2 Gsps,
without affecting dynamic performances (it does not require a single to differential balun).
In a single-ended input configuration, the in-phase full-scale input amplitude is 0.5V peak-to-
peak, centered on 0V (or -2 dBm into 50 ).
Figure 42. Typical Single-ended Analog Input Configuration (Full-scale)
The analog full-scale input range is 0.5V peak-to-peak (Vpp), or -2 dBm into the 50
differential) termination resistor.
In the differential mode input configuration, this means 0.25V on each input, or ±125 mV
around 0V. The input common mode is ground.
Figure 43. Differential Inputs Voltage Span (Full-scale)
The TS83102G0B analog input features a 100
(2 x 50
differential) resistors (±2% matching) soldered into the package cavity.
The transmission lines of the ADC package’s analog inputs feature a 50
ance. Each single-ended die input pad capacitance (taking into account the ESD protection) is
0.3 pF. This leads to a global input VSWR (including ball, package and bounding) of less than
1.2 from DC up to 2.5 GHz.
500 mV
Full-scale
Analog Input
500 mV
Full-scale
Analog Input
// 0.3 pF). Each analog input (VIN,VINB) is terminated by 50
+250
+125
mV
-250
mV
-125
VIN
(±2%) differential input impedance
VIN
VINB = 0V
VINB
single-ended (100
controlled imped-
2101D–BDC–06/04
0V
t
(100
t