74SSTU32865BKG8 IDT, Integrated Device Technology Inc, 74SSTU32865BKG8 Datasheet - Page 11

• Manufacturer Part Number: 74SSTU32865BKG8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 74SSTU32865BKG8

• Logic Family: SSTU
• Logical Function: Reg Bfr W/ParityTst
• Number Of Elements: 1
• Number Of Bits: 28
• Number Of Inputs: 28
• Number Of Outputs: 56
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 270(Min)MHz
• Mounting: Surface Mount
• Pin Count: 160
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

SWITCHING CHARACTERISTICS OVER RECOMMENDED FREE-AIR OPERATING
RANGE (UNLESS OTHERWISE NOTED)
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS.
2. Includes 350ps of test load transmission line delay.
3. This parameter is not production tested.
4. Difference between dV/dt_r (rising edge rate) and dV/dt_f (falling edge rate).
IDT74SSTU32865
28-BIT 1:2 REGISTERED BUFFER WITH PARITY
t
dV/dt_Δ
PDMSS
Symbol
dV/dt_r
dV/dt_f
t
PDM
t
f
RPHL
t
MAX
t
t
PLH
LH
HL
(2)
(2,3)
(4)
Parameter
CLK and CLK to Q
LOW to HIGH Delay, CLK and CLK to PYTERR
HIGH to LOW Delay, CLK and CLK to PYTERR
LOW to HIGH Propagation Delay, RESET to PYTERR
CLK and CLK to Q (simultaneous switching)
RESET to Q
Output slew rate from 20% to 80%
Output slew rate from 20% to 80%
Output slew rate from 20% to 80%
11
(1)
1.41
Min
270
1.2
—
—
—
—
1
1
1
V
DD
= 1.8V ± 0.1V
COMMERCIAL TEMPERATURE RANGE
Max.
2.15
2.35
—
3
3
3
3
4
4
1
MHz
V/ns
V/ns
V/ns
Unit
ns
ns
ns
ns
ns
ns