PNX1311EH/G NXP Semiconductors, PNX1311EH/G Datasheet - Page 504

• Manufacturer Part Number: PNX1311EH/G
• Manufacturer: NXP Semiconductors

Specifications of PNX1311EH/G

• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
Write destination program counter
SYNTAX
FUNCTION
DESCRIPTION
a hardware update (during an interruptible jump) and a software update (through a
software update takes precedence.
handling routine as a jump address to resume execution of the program that was running before the exception was
taken.
modification of DPC. If the LSB of rguard is 1, DPC is written; otherwise, DPC is unchanged.
EXAMPLES
r30 = 0xbeebee
r20 = 0, r31 = 0xabba
r21 = 1, r31 = 0xabba
The
Interruptible jumps write their target address to the DPC. The value of DPC is intended to be used by an exception-
The
[ IF rguard ] writedpc rsrc1
if rguard then {
}
DPC ← rsrc1
writedpc
writedpc
Initial Values
copies the value of rsrc1 to the DPC (Destination Program Counter) processor register. Whenever
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
writedpc r30
IF r20 writedpc r31
IF r21 writedpc r31
Operation
PRELIMINARY SPECIFICATION
DPC ← 0xbeebee
no change, since guard is false
DPC ← 0xabba
PNX1300/01/02/11 DSPCPU Operations
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
readdpc writespc ijmpf
writedpc
Result
ijmpi ijmpt
ATTRIBUTES
SEE ALSO
writedpc
) coincide, the
fcomp
160
No
—
1
1
3
A-206