PNX1311EH/G NXP Semiconductors, PNX1311EH/G Datasheet - Page 500
PNX1311EH/G
Manufacturer Part Number
PNX1311EH/G
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1311EHG.pdf
(548 pages)
Specifications of PNX1311EH/G
Lead Free Status / RoHS Status
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Philips Semiconductors
Unsigned multiply
SYNTAX
FUNCTION
DESCRIPTION
full 64-bit product into rdest. The operands are considered unsigned integers. No overflow or underflow detection is
performed.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
r60 = 0x100
r10 = 0, r60 = 0x100, r30 = 0xf11
r20 = 1, r60 = 0x100, r30 = 0xf11
r70 = 0x100, r40 = 0xffffff9c
As shown below, the
The
[ IF rguard ] umul rsrc1 rsrc2 → rdest
if rguard then
rsrc1
temp ← zero_ext32to64(rsrc1) × zero_ext32to64(rsrc2)
rdest ← temp<31:0>
64-bit result
31
umul
Initial Values
63
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
umul
unsigned
operation computes the product rsrc1×rsrc2 and writes the least-significant 32 bits of the
rdest
31
umul r60 r60 → r80
IF r10 umul r60 r30 → r50
IF r20 umul r60 r30 → r90
umul r70 r40 → r100
0
Operation
unsigned
unsigned
×
31
PRELIMINARY SPECIFICATION
rsrc2
31
PNX1300/01/02/11 DSPCPU Operations
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
r80 ← 0x10000
no change, since guard is false
r90 ← 0xf1100
r100 ← 0xffff9c00
imul imulm umulm dspimul
unsigned
dspumul dspidualmul
quadumulmsb fmul
ATTRIBUTES
SEE ALSO
Result
0
umul
ifmul
138
2, 3
No
—
0
2
3
A-202
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