LSISAS1064 LSI, LSISAS1064 Datasheet - Page 82
LSISAS1064
Manufacturer Part Number
LSISAS1064
Description
Manufacturer
LSI
Datasheet
1.LSISAS1064.pdf
(152 pages)
Specifications of LSISAS1064
Lead Free Status / RoHS Status
Not Compliant
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4-14
This four-byte register contains the base address and size information for
the expansion ROM.
Register: 0x34
Capabilities Pointer
Read Only
PCI Host Register Description
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
7
x
x
Expansion ROM Base Address
These bits correspond to the upper 21 bits of the
expansion ROM base address. The host system detects
the size of the external memory by first writing
0xFFFFFFFF to this register and then reading the
register back. The LSISAS1064 responds with zeros in all
don’t care locations. The least significant one (1) that
remains represents the binary version of the external
memory size. For example, to indicate an external
memory size of 32 Kbytes, this register returns ones in
the upper 17 bits when written with 0xFFFFFFFF and
read back.
Reserved
This field is reserved.
Expansion ROM Enable
This bit controls if the device accepts accesses to its
expansion ROM. Setting this bit enables address
decoding. Depending on the system configuration, the
device can optionally use an expansion ROM. Note that
to access the expansion ROM, the user must also set
bit 1 in the PCI
Capabilities Pointer
This register indicates the location of the first extended
capabilities register in PCI Configuration Space. The
value of this register varies according to system
configuration.
x
Capabilities Pointer
x
Command
x
register.
x
x
[31:11]
[10:1]
0
x
[7:0]
0