LSISAS1064 LSI, LSISAS1064 Datasheet - Page 36

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

2.3.1.3
2.3.2
Table 2.1
2-10
C_BE[3:0]/ PCI Command
0b0000
0b0001
0b0010
0b0011
0b0100
0b0101
0b0110
0b0111
0b1000
0b1001
0b1010
0b1011
PCI Commands and Functions
PCI Memory Space
Interrupt Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read
Memory Write
Reserved
Reserved
Configuration Read
Configuration Write
PCI/PCI-X Bus Commands and Encodings
The LSISAS1064 contains two PCI memory spaces: PCI Memory
Space [0] and PCI Memory Space [1]. PCI Memory Space [0] supports
normal memory accesses while PCI Memory Space [1] supports
diagnostic memory accesses. The LSISAS1064 requires 64 Kbytes of
memory space.
The PCI specification defines memory space as a contiguous 64-bit
memory address that all system resources share. The
and
PCI Memory Space [0] occupies. The
High
Space [1] occupies.
Bus commands indicate to the target the type of transaction the master
is requesting. The master encodes the bus commands on the C_BE[3:0]/
lines during the address phase. The PCI bus command encodings
appear in
Functional Description
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
Memory [0] High
registers determine which 64 Kbyte memory area PCI Memory
Table
2.1.
PCI-X Command
Interrupt Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read Dword
Memory Write
Alias to
Memory Read Block
Alias to
Memory Write Block
Configuration Read
Configuration Write
registers determine which 64 Kbyte memory area
Memory [1] Low
1
as Master
PCI-X: No
PCI-X: No
Supports
PCI: N/A
PCI: N/A
N/A
N/A
Yes
Yes
Yes
Yes
No
No
No
No
Memory [0] Low
and
Memory [1]
PCI-X: Yes
PCI-X: Yes
Supports
as Slave
PCI: N/A
PCI: N/A
Yes
Yes
N/A
N/A
Yes
Yes
Yes
Yes
No
No