LSISAS1064 LSI, LSISAS1064 Datasheet - Page 42

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

2.3.5
2.3.6
2-16
PCI Interrupts
Power Management
The LSISAS1064 signals an interrupt to the host processor either using
PCI interrupt pins (INTA/ and ALT_INTA/), or Message Signaled
Interrupts (MSI and MSI-X). The Interrupt Request Routing Mode bits in
the
either the INTA/ and/or the ALT_INTA/ pin.
MSI is an optional feature that enables a device to signal an interrupt by
writing to a specified address. MSI-X is an extension of the MSI that
increases the number of available message vectors, allows software
aliasing of message vectors, and allows each message vector to use an
independent address and data value. If using MSI or MSI-X, the
LSISAS1064 does not signal interrupts on INTA/ or ALT_INTA/. Note that
enabling MSI or MSI-X to mask PCI interrupts is a violation of the PCI
specification. The LSISAS1064 implements its own MSI and MSI-X
register sets. The MSI functionality is managed through the MSI register
set, and the MSI-X functionality is managed through the MSI-X register
set. The PCI specification prohibits system software from simultaneously
enabling MSI and MSI-X.
The
interrupt to the host processor by selectively masking reply interrupts and
system doorbell interrupts. This register masks both pin-based and MSI-
based interrupts.
The LSISAS1064 complies with the PCI Power Management Interface
Specification, Revision 1.2, and the PC2001 System Design Guide. The
LSISAS1064 supports the D0, D1, D2, D3
D0 is the maximum power state, and D3 is the minimum power state.
Power State D3 is further categorized as D3
device off places it in the D3
Functional Description
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
Host Interrupt Mask
Host Interrupt Mask
register configure the routing of each interrupt to
register also prevents the assertion of a PCI
cold
Power State.
hot
hot
, and D3
or D3
cold
cold
. Powering the
power states.