LSISAS1064 LSI, LSISAS1064 Datasheet - Page 65

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

Table 3.14
3.11 Power-On Sense Pins Description
Signal Name
RX_VDD[3:0]
RXB_VDD[3:0]
TX_VDD[3:0]
TXB_VDD[3:0]
NC
Power and Ground Signals (Cont.)
BGA Position
A12, E14, A22, C23
D12, C17, E19, G19
B9, E13, C18, C22
B10, A18, E18, F19
A11, A16, A21, B8, B22, B23,
C8, C14, C15, C19, C20, D6,
D7, D8, D9, D14, D15, D16,
D22, E7, E8, E9, E10, E15, E16,
E17, F9, G4, G6, G22, H5, H6,
H22, J4, J6, J21, J23, K5, K22,
K25, L22, M4, M23, N4, N5,
N23, N24, P3, P4, P22, R4, R5,
T25, U5, U22, V2, V6, V22, V23,
W2, W4, W6, W21, W22, Y1, Y5,
Y21, AA7, AA8, AA18, AB8,
AB9, AB11, AB13, AB15, AB16,
AC7, AC9, AC13, AC14, AC15,
AC18, AC21, AD11, AE2, AE14
This section discusses the power-on sense pin configuration options. For
setting global operating conditions, the LSISAS1064 uses power-on
sense register bits that source their data from the state of the memory
address/data bus (MAD[31:0]) during the device boot up sequence. The
MAD signals are 3-stated and read continuously during PCI reset, and
are latched upon removal of the PCI reset signal. Each of these pins
contains an internal pull-down resistor and senses the presence of an
external 4.7 k
Provide both pull-up and pull-down options for all MAD[31:0] bus signals.
Pull all reserved MAD bus signals LOW.
on sense options.
Power-On Sense Pins Description
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
pull-up resistor that is tied to 3.3 V Vdd power.
Type Description
P
P
P
P
These signals provide 1.2 V power for the
GigaBlaze core.
No connect.
Table 3.15
describes the power-
3-13