ISP1183BS STEricsson, ISP1183BS Datasheet - Page 41

• Manufacturer Part Number: ISP1183BS
• Manufacturer: STEricsson

Specifications of ISP1183BS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 44.
Table 46.
[1]
ISP1183_3
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reset value of this bit depends on the current USB bus status. If the bus is idle, the reset value will be 1.
Chip ID register: bit allocation
Interrupt register: bit allocation
BUSTATUS
12.4.5 Interrupt register (R: C0h)
EP14
EP6
0
15
31
23
15
R
R
R
R
0
0
R
R
7
0
7
[1]
Table 45.
This command indicates the sources of interrupts as stored in the 4-byte Interrupt register.
Each individual endpoint has its own interrupt bit. The bit allocation of the Interrupt register
is shown in
routine. Interrupts are enabled through the Interrupt Enable register, see
While reading the interrupt register, read all the 4 bytes completely.
Code: C0h — read Interrupt register
Transaction — read 4 bytes
Bit
15 to 8
7 to 0
SP_EOT
EP13
EP5
14
30
22
14
R
R
R
0
0
R
R
R
6
0
6
0
Chip ID register: bit description
Table
Symbol
CHIPIDH[7:0]
CHIPIDL[7:0]
46. Bit BUSTATUS verifies the current bus status in the interrupt service
PSOF
EP12
EP4
13
29
21
13
R
R
R
0
0
R
R
R
5
0
5
0
Rev. 03 — 20 January 2009
Description
chip ID code (82h)
silicon version (11h)
EP11
SOF
EP3
12
28
20
12
R
R
R
R
0
0
R
R
4
0
4
0
CHIPIDH[7:0]
CHIPIDL[7:0]
reserved
82h
Low-power USB Peripheral Controller with DMA
11h
EP10
EOT
EP2
11
27
19
11
R
R
R
0
0
R
R
R
3
0
3
0
SUSPND
EP9
EP1
10
26
18
10
R
R
R
0
0
R
R
R
2
0
2
0
RESUME
© ST-NXP Wireless 2009. All rights reserved.
EP0IN
EP8
25
17
R
R
R
9
R
0
0
R
R
1
9
0
1
0
ISP1183
Section
EP0OUT
RESET
12.1.5.
EP7
24
16
R
R
R
8
R
0
0
R
R
0
8
0
0
0
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