W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 167

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W83877ATG

Manufacturer Part Number
W83877ATG
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83877ATG

Lead Free Status / RoHS Status
Supplier Unconfirmed
11.4.12
Register Location:
Default Value:
Attribute:
Size:
11.4.13
Register Location:
Default Value:
Attribute:
Size:
These bits indicate the status of the SCI input, which is set when the device's IRQ is raised. If the
corresponding enable bit in the SCI interrupt enable register (in GP0EN1) is set, an SCI interrupt is
raised and routed to the output pin. Wrinting a 1 clears the bit, and writing a 0 has no effect. If the bit
is not cleared, new IRQ for the SCI logic input is ignored, therefore no SCI interrupt is raised.
0-7
0
1
2
3
4-7
BIT
BIT
Reserved
URBSCISTS
URASCISTS
FDCSCISTS
PRTSCISTS
Reserved
Power Management 1 Timer 4 (PM1TMR4)
General Purpose Event 0 Status Register 1 (GP0STS1)
NAME
NAME
<CR33>+BH System I/O Space
00h
Read only
8 bits
Reserved. These bits always return a value of zero.
<CR34> System I/O Space
00h
Read/write
8 bits
UART B SCI status, which is set by the UART B IRQ.
UART A SCI status, which is set by the UART A IRQ.
FDC SCI status, which is set by the FDC IRQ.
PRT SCI status, which is set by the printer port IRQ.
Reserved.
7
7
6
6
5
5
4
4
3
3
- 160 -
2
2
DESCRIPTION
DESCRIPTION
W83877ATF/W83877ATG
1
1
0
0
URBSCISTS
URASCISTS
FDCSCISTS
PRTSCISTS
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved

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