W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 163

• Manufacturer Part Number: W83877ATG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83877ATG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

11.4.5 Power Management 1 Control Register 1 (PM1CTL1)
Register Location:
Default Value:
Attribute:
Size:
11.4.6 Power Management 1 Control Register 2 (PM1CTL2)
Register Location:
Default Value:
Attribute:
Size:
0
1
2
3-7
0-7
BIT
BIT
SCI_EN
BM_RLD
GBL_RLS
Reserved
Reserved
NAME
NAME
Reserved. These bits always return a value of zero.
<CR33>+4H System I/O Space
00h
Read/write
8 bits
Select the power management event to be either an SCI or an SMI interrupt.
When this bit is set, the power management events will generate an SCI
interrupt. When this bit is reset and SMI_EN bit is set, the power
management events will generate an SMI interrupt.
This is the bus master reload enable bit. If this bit is set and BM_CNTRL is
set, an SCI interrupt is raised.
The global release bit. This bit is used by the ACPI software to raise an
event to the BIOS software. The BIOS software has a corresponding enable
and status bit to control its ability to receive the ACPI event. Setting
GBL_RLS sets BIOS_STS, and it generates an SMI interrupt if BIOS_EN is
also set.
Reserved. These bits always return a value of zero.
<CR33>+5H System I/O Space
00h
Read/write
8 bits
7
7
6
6
5
5
4
4
3
3
- 156 -
2
2
1
DESCRIPTION
1
DESCRIPTION
W83877ATF/W83877ATG
0
0
SCI_EN
BM_RLD
GBL_RLD
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved