MT49H16M18CBM-25 Micron Technology Inc, MT49H16M18CBM-25 Datasheet - Page 13

• Manufacturer Part Number: MT49H16M18CBM-25
• Manufacturer: Micron Technology Inc
• Type: RLDRAMr

Specifications of MT49H16M18CBM-25

• Organization: 16Mx18
• Density: 288Mb
• Address Bus: 23b
• Maximum Clock Rate: 400MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: uBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 779mA
• Pin Count: 144
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Table 4:
PDF: 09005aef80a41b59/Source: 09005aef811ba111
288Mb_RLDRAM_II_SIO_D2.fm - Rev. P 1/11 EN
Description
Standby current
Active standby
current
Operational
current
Operational
current
Operational
current
Burst refresh
current
Distributed
refresh current
Operating burst
write current
example
Operating burst
write current
example
Operating burst
write current
example
Operating burst
read current
example
Operating burst
read current
example
Operating burst
read current
example
I
Notes are on page 13
DD
Conditions
t
toggling
t
Bank address incremented and half
address/data change once every 4
clock cycles
BL = 2;
active; Half address changes once per
t
sequence
BL = 4;
active; Half address changes once per
t
sequence
BL = 8;
active; Half address changes once per
t
sequence
t
refresh; Data inputs are switching
t
refresh; Half address/data toggle
BL = 2;
bank access; Half of address bits
change every clock cycle; Continuous
data
BL = 4;
bank access; Half of address bits
change every 2 clock cycles;
Continuous data
BL = 8;
bank access; Half of address bits
change every 4 clock cycles;
Continuous data
BL = 2; Cyclic bank access; Half of
address bits change every clock cycle;
Measurement is taken during
continuous READ
BL = 4; Cyclic bank access; Half of
address bits change every 2 clocks;
Measurement is taken during
continuous READ
BL = 8; Cyclic bank access; Half of
address bits change every 4 clock
cycles; Measurement is taken during
continuous READ
Operating Conditions and Maximum Limits—Rev. B
CK = Idle; All banks idle; No inputs
CK = MIN, CS# = 1; No commands;
RC; Read followed by write
RC; Read followed by write
RC; Read followed by write
CK = MIN;
CK = MIN;
Notes:
t
t
t
t
t
t
CK = MIN;
CK = MIN;
CK = MIN;
CK = MIN;
CK = MIN;
CK = MIN;
1. I
2.
t
t
RC = MIN; Cyclic bank
RC = MIN; Single bank
≤ V
t
DD
CK =
DD
specifications are tested after the device is properly initialized. +0°C ≤ T
t
t
t
t
t
t
t
RC = MIN; 1 bank
RC = MIN; 1 bank
RC = MIN; 1 bank
RC = MIN; Cyclic
RC = MIN; Cyclic
RC = MIN; Cyclic
≤ +1.9V, +2.38V ≤ V
DK = MIN,
288Mb: x18 2.5V V
t
RC = MIN.
EXT
I
I
I
I
I
I
I
I
I
I
I
DD2W
DD4W
DD8W
I
I
I
I
I
I
I
I
DD2W
DD4W
DD8W
DD2R
DD4R
DD8R
I
I
I
I
I
DD2R
DD4R
DD8R
I
I
REF1
REF2
DD1
DD2
DD3
REF1
REF2
SB1
SB2
DD1
DD2
DD3
Symbol
SB1
SB2
13
≤ +2.63V, +1.4V ≤ V
x18
x18
x18
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
EXT
EXT
DD
DD
EXT
EXT
EXT
EXT
EXT
DD
DD
DD
DD
DD
EXT
EXT
EXT
EXT
EXT
EXT
DD
DD
DD
DD
DD
DD
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
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EXT
-18
, 1.8V V
DDQ
-25E
Electrical Specifications – I
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≤ V
DD
DD
, V
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-25
, HSTL, SIO, RLDRAM II
REF
©2003Micron Technology, Inc. All rights reserved.
= V
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DDQ
-33
/2.
C
≤ +95°C; +1.7V
TBD
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-5
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
DD