XC5VLX50-1FFG676I Xilinx Inc, XC5VLX50-1FFG676I Datasheet - Page 174

• Manufacturer Part Number: XC5VLX50-1FFG676I
• Description: FPGA Virtex®-5 Family 46080 Cells 65nm (CMOS) Technology 1V 676-Pin FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX50-1FFG676I

• Package: 676FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 46080
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 440
• Ram Bits: 1769472
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Total Ram Bits: 1769472
• Number Of I /o: 440
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 676-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 5: Configurable Logic Blocks (CLBs)
174
Slice Description
X-Ref Target - Figure 5-2
Every slice contains four logic-function generators (or look-up tables), four storage
elements, wide-function multiplexers, and carry logic. These elements are used by all slices
to provide logic, arithmetic, and ROM functions. In addition to this, some slices support
two additional functions: storing data using distributed RAM and shifting data with 32-bit
registers. Slices that support these additional functions are called SLICEM; others are
called SLICEL. SLICEM (shown in
connections found in all slices. SLICEL is shown in
Figure 5-2: Row and Column Relationship between CLBs and Slices
CLB
CLB
COUT
X0Y1
X0Y0
Slice
Slice
CIN
COUT
www.xilinx.com
COUT
X1Y1
X1Y0
Slice
Slice
Figure
CIN
COUT
5-3) represents a superset of elements and
CLB
CLB
COUT
X2Y1
X2Y0
Slice
Slice
Figure
CIN
COUT
5-4.
UG190_5_02_122605
COUT
X3Y1
X3Y0
Slice
Slice
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
CIN
COUT