IDT92HD81B1X5NLGXYCX8 IDT, Integrated Device Technology Inc, IDT92HD81B1X5NLGXYCX8 Datasheet - Page 30
IDT92HD81B1X5NLGXYCX8
Manufacturer Part Number
IDT92HD81B1X5NLGXYCX8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT92HD81B1X5NLGXYCX8.pdf
(289 pages)
Specifications of IDT92HD81B1X5NLGXYCX8
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92HD81
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
EAPD PIN
MODE 1:0
BTL/HP SD
BTL/HP SD
MODE
BTL/HP SD INV
IDT™ CONFIDENTIAL
Control Flag
2.17. EAPD
MODE1
0
0
1
1
Defines if EAPD pin is used as input, output, or bi-directional port (Open Drain)
0 = Amp controlled by EAPD pin only (default) / 1 = Amp controlled by power state (pin and FG) only
0 = Amp will mute when disabled. (default) / 1 = Amp will shut down (enter a low power state) when disabled
0 = AMP will power down (or mute) when EAPD pin is low (default) / 1 = Amp will power down (or mute) when EAPD
pin is high.
The EAPD pin (pin 47) is a dedicated, bi-directional control pin. Although named External Amplifier
Power Down (EAPD) by the HD Audio specification, this pin operates as an external amplifier power
up signal. The EAPD value is reflected on the EAPD pin; a 1 causes the external amplifier to power
up (equivalent to D0), and a 0 causes it to power down (equivalent to D3.) When the EAPD value =
1, the EAPD pin must be placed in a state appropriate to the current power state of the associated
Pin Widget even though the EAPD value (in the register) may remain 1. The default state of this pin
is 0 (driving low.) The pin defaults to an open-drain configuration (an external pull-up is recom-
mended.)
Per the HD Audio specification and ECR15b, multiple ports may control EAPD. The EAPD pin
assumes the highest power state of all the EAPD bits in all of the pin complexes. The default value of
EAPD is 1 (powered on), but the FG power state will override and the pin will be low. A port will
request External Amp Power Up when its power state is active (FG and pin widget power state is D1
or D0) or (Analog PC_Beep is enabled and port is enabled as an output) and the port’s EAPD bit is
set to 1. The state of the EAPD pin (unless configured as an input or held low by an external circuit
when configured as an open drain output) will be the logical OR of the external amp power up
requests from all ports.
By default, the EAPD pin also functions as the Mute#/ShutDown# input for the internal BTL amplifier.
In this mode, a low value at the pin (either due to internal EAPD being 0, or to an external entity forc-
ing the pin low) will cause the internal BTL amplifier to mute or enter a low power state depending on
the amplifier configuration. (See below)
Vendor specific verbs are available to configure this pin. These verbs retain their values across link
and single function group resets but are set to their default values by a power on reset:
MODE0
0
1
0
1
EAPD Pin Function
Open Drain I/O
CMOS Output
CMOS Input
CMOS Input
External signal controls internal amps. EAPD bit in pin widget ignored
External signal controls internal amps. EAPD bit in pin widget ignored
Value at pin is wired-AND of EAPD bit and external signal. (default)
30
Description
Value of EAPD bit in pin widget is forced at pin
Description
V 0.987 11/09
92HD81
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