ISP1504CBS,157 NXP Semiconductors, ISP1504CBS,157 Datasheet - Page 68
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ISP1504CBS,157
Manufacturer Part Number
ISP1504CBS,157
Description
RF Transceiver USB2.0 ULPI OTG
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1504ABS118.pdf
(83 pages)
Specifications of ISP1504CBS,157
Number Of Transceivers
1
Esd Protection
YeskV
Operating Supply Voltage (typ)
Not RequiredV
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
Not RequiredV
Operating Supply Voltage (min)
Not RequiredV
Pin Count
32
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Supply Voltage
1.65 V to 3.6 V
Mounting Style
SMD/SMT
Package / Case
HVQFN-32
Lead Free Status / RoHS Status
Compliant
Other names
935278309157 ISP1504CBS
NXP Semiconductors
ISP1504A_ISP1504C_3
Product data sheet
Fig 29. Rise time and fall time
Fig 31. Timing of TX_ENABLE to DP and DM
1.8 V
V
V
V
V
0 V
OH
OH
OL
OL
logic
input
differential
data lines
0.9 V
t
HSR
10 %
15.1 ULPI timing
, t
FR
t
V
t
PZH
PZL
CRS
, t
LR
90 %
ULPI interface timing requirements are given in
synchronous mode only. All timing is measured with respect to the ISP1504 CLOCK pin.
All signals are clocked on the rising edge of CLOCK.
Fig 33. ULPI interface timing
CONTROL OUT
CONTROL IN
(DIR, NXT)
DATA OUT
DATA IN
CLOCK
V
V
(8-BIT)
(8-BIT)
OH
90 %
(STP)
OL
+ 0.3 V
t
0.3 V
HSF
t
t
PHZ
0.9 V
PLZ
10 %
, t
FF
, t
LF
t
su(DATA)
t
su(STP)
004aaa861
Rev. 03 — 7 April 2008
004aaa574
t
t
h(STP)
h(DATA)
Fig 30. Timing of TX_DAT and TX_SE0 to DP and DM
Fig 32. Timing of DP and DM to RX_RCV, RX_DP and
1.8 V
differential
data lines
V
V
0 V
logic input
OH
OL
logic output
0.8 V
2.0 V
V
V
differential
data lines
OH
OL
RX_DM
0.9 V
ISP1504A; ISP1504C
V
t
t
CRS
Figure
t
d(DIR)
d(NXT)
d(DATA)
t
PLH(drv)
,
V
t
t
PLH(se)
PLH(rcv)
CRS
33. This timing applies to
0.9 V
ULPI HS USB OTG transceiver
t
t
d(DIR)
d(NXT)
,
© NXP B.V. 2008. All rights reserved.
t
PHL(drv)
0.9 V
t
t
V
PHL(rcv)
PHL(se)
CRS
V
004aaa575
004aaa722
004aaa573
CRS
0.9 V
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