PIC32MX110F016B-I/SS Microchip Technology, PIC32MX110F016B-I/SS Datasheet - Page 97

• Manufacturer Part Number: PIC32MX110F016B-I/SS
• Description: PIC32, 16KB Flash, 4KB RAM, 40 MHz, CTMU, 4 DMA 28 SSOP .209in TUBE
• Manufacturer: Microchip Technology

REGISTER 8-1:
© 2011 Microchip Technology Inc.
Legend:
R = Readable bit
-n = Value at POR
bit 31-30 Unimplemented: Read as ‘0’
bit 29-27 PLLODIV<2:0>: Output Divider for PLL
bit 26-24 FRCDIV<2:0>: Internal Fast RC (FRC) Oscillator Clock Divider bits
bit 23
bit 22
bit 21
bit 20-19 PBDIV<1:0>: Peripheral Bus Clock (PBCLK) Divisor bits
Note 1:
Range
31:24
23:16
15:8
Bit
7:0
2:
111 = PLL output divided by 256
110 = PLL output divided by 64
101 = PLL output divided by 32
100 = PLL output divided by 16
011 = PLL output divided by 8
010 = PLL output divided by 4
001 = PLL output divided by 2
000 = PLL output divided by 1
111 = FRC divided by 256
110 = FRC divided by 64
101 = FRC divided by 32
100 = FRC divided by 16
011 = FRC divided by 8
010 = FRC divided by 4
001 = FRC divided by 2 (default setting)
000 = FRC divided by 1
Unimplemented: Read as ‘0’
SOSCRDY: Secondary Oscillator (S
1 = Indicates that the Secondary Oscillator is running and is stable
0 = Secondary Oscillator is still warming up or is turned off
PBDIVRDY: Peripheral Bus Clock (PBCLK) Divisor Ready bit
1 = PBDIV<1:0> bits can be written
0 = PBDIV<1:0> bits cannot be written
11 = PBCLK is SYSCLK divided by 8 (default)
10 = PBCLK is SYSCLK divided by 4
01 = PBCLK is SYSCLK divided by 2
00 = PBCLK is SYSCLK divided by 1
Writes to this register require an unlock sequence. Refer to Section 6. “Oscillator” (DS61112) in the
“PIC32 Family Reference Manual” for details.
This bit is available on PIC32MX2XX devices only.
31/23/15/7
CLKLOCK
R/W-0
Bit
U-0
U-0
U-0
—
—
—
OSCCON: OSCILLATOR CONTROL REGISTER
SOSCRDY PBDIVRDY
30/22/14/6
ULOCK
Bit
U-0
R-0
R-0
R-0
—
(2)
COSC<2:0>
y = Value set from Configuration bits on POR
W = Writable bit
‘1’ = Bit is set
29/21/13/5
SLOCK
R/W-y
Bit
R-1
R-0
R-0
OSC
PLLODIV<2:0>
Preliminary
) Ready Indicator bit
28/20/12/4
SLPEN
R/W-y
R/W-y
R/W-0
Bit
R-0
PBDIV<1:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
27/19/11/3
R/W-y
R/W-y
R/W-0
Bit
CF
U-0
—
PIC32MX1XX/2XX
UFRCEN
26/18/10/2
(1)
R/W-0
R/W-y
R/W-y
R/W-0
Bit
(2)
PLLMULT<2:0>
FRCDIV<2:0>
NOSC<2:0>
x = Bit is unknown
25/17/9/1
SOSCEN
R/W-0
R/W-y
R/W-y
R/W-y
Bit
DS61168C-page 97
24/16/8/0
OSWEN
R/W-1
R/W-y
R/W-y
R/W-0
Bit