PIC32MX110F016B-I/SS Microchip Technology, PIC32MX110F016B-I/SS Datasheet - Page 134

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PIC32MX110F016B-I/SS

Manufacturer Part Number
PIC32MX110F016B-I/SS
Description
PIC32, 16KB Flash, 4KB RAM, 40 MHz, CTMU, 4 DMA 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Datasheet
PIC32MX1XX/2XX
REGISTER 10-10: U1STAT: USB STATUS REGISTER
DS61168C-page 134
Legend:
R = Readable bit
-n = Value at POR
bit 31-8 Unimplemented: Read as ‘0’
bit 7-4
bit 3
bit 2
bit 1-0
Note 1:
Range
31:24
23:16
15:8
7:0
Bit
ENDPT<3:0>: Encoded Number of Last Endpoint Activity bits
(Represents the number of the BDT, updated by the last USB transfer.)
1111 = Endpoint 15
1110 = Endpoint 14
0001 = Endpoint 1
0000 = Endpoint 0
DIR: Last BD Direction Indicator bit
1 = Last transaction was a transmit transfer (TX)
0 = Last transaction was a receive transfer (RX)
PPBI: Ping-Pong BD Pointer Indicator bit
1 = The last transaction was to the ODD BD bank
0 = The last transaction was to the EVEN BD bank
Unimplemented: Read as ‘0’
31/23/15/7
The U1STAT register is a window into a 4-byte FIFO maintained by the USB module. U1STAT value is
only valid when U1IR<TRNIF> is active. Clearing the U1IR<TRNIF> bit advances the FIFO. Data in
register is invalid when U1IR<TRNIF> = 0.
Bit
U-0
U-0
U-0
R-x
30/22/14/6
Bit
U-0
U-0
U-0
R-x
ENDPT<3:0>
W = Writable bit
‘1’ = Bit is set
29/21/13/5
Bit
U-0
U-0
U-0
R-x
Preliminary
28/20/12/4
Bit
U-0
U-0
U-0
R-x
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
27/19/11/3
DIR
Bit
U-0
U-0
U-0
R-x
26/18/10/2
PPBI
Bit
U-0
U-0
U-0
R-x
© 2011 Microchip Technology Inc.
x = Bit is unknown
25/17/9/1
Bit
U-0
U-0
U-0
U-0
24/16/8/0
Bit
U-0
U-0
U-0
U-0

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