PIC24HJ32GP202-E/MM Microchip Technology, PIC24HJ32GP202-E/MM Datasheet - Page 58

16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE

PIC24HJ32GP202-E/MM

Manufacturer Part Number
PIC24HJ32GP202-E/MM
Description
16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ32GP202-E/MM

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC24HJ32GP202/204 AND PIC24HJ16GP304
TABLE 6-2:
6.2
A Power-on Reset (POR) circuit ensures the device is
reset from power-on. The POR circuit is active until
V
has elapsed. The delay T
device bias circuits become stable.
The device supply voltage characteristics must meet
the
requirements to
Section 22.0 “Electrical Characteristics”
The POR status bit in the Reset Control register
(RCON<0>) is set to indicate the Power-on Reset.
DS70289G-page 58
V
T
V
T
T
T
DD
POR
POR
BOR
BOR
PWRT
FSCM
Note:
crosses the V
specified
Power-on Reset (POR)
When the device exits the Reset condi-
tion (begins normal operation), the
device operating parameters (voltage,
frequency, temperature, etc.) must be
within their operating ranges, otherwise
the device may not function correctly.
The user application must ensure that
the delay between the time power is
first applied, and the time SYSRST
becomes inactive, is long enough to get
all
specification.
Symbol
starting
OSCILLATOR DELAY
operating
POR
generate
threshold and the delay T
voltage
POR
the
parameters
ensures the internal
POR.
POR threshold
POR extension time
BOR threshold
BOR extension time
Programmable power-up time delay
Fail-Safe Clock Monitor Delay
and
for details.
rise
Refer
within
POR
rate
Parameter
to
6.2.1
The on-chip regulator has a Brown-out Reset (BOR)
circuit that resets the device when the V
(V
circuit keeps the device in Reset until V
V
delay T
becomes stable.
The BOR status bit in the Reset Control register
(RCON<1>) is set to indicate the Brown-out Reset.
The device will not run at full speed after a BOR as the
V
operation. The PWRT provides power-up time delay
(T
stabilized at the appropriate levels for full-speed
operation before the SYSRST is released.
The power-up timer delay (T
the
(FPWRT<2:0>)
(FPOR<2:0>) register, which provides eight settings
(from 0 ms to 128 ms). Refer to
Features”
Figure 6-3
reset delay (T
rises above the V
BOR
DD
PWRT
DD
should rise to acceptable levels for full-speed
< V
threshold and the delay T
Power-on
) to ensure that the system power supplies have
BOR
BOR
shows the typical brown-out scenarios. The
for further details.
Brown-out Reset (BOR) and
Power-up Timer (PWRT)
1.8V nominal
30 μs maximum
2.5V nominal
100 μs maximum
0-128 ms nominal
900 μs maximum
) for proper device operation. The BOR
BOR
ensures the voltage regulator output
BOR
bits
+ T
Reset
PWRT
trip point
in
© 2011 Microchip Technology Inc.
) is initiated each time V
the
PWRT
Timer
Value
Section 19.0 “Special
BOR
POR
) is programmed by
has elapsed. The
Value
Configuration
DD
DD
is too low
crosses
Select
DD

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