PIC24HJ32GP202-E/MM Microchip Technology, PIC24HJ32GP202-E/MM Datasheet - Page 143

16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE

PIC24HJ32GP202-E/MM

Manufacturer Part Number
PIC24HJ32GP202-E/MM
Description
16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ32GP202-E/MM

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.0
The Inter-Integrated Circuit (I
complete hardware support for both Slave and
Multi-Master modes of the I
standard, with a 16-bit interface.
The I
• The SCLx pin is clock
• The SDAx pin is data.
The I
• I
• I
• I
• I
• Serial clock synchronization for I
• I
© 2011 Microchip Technology Inc.
modes of operation
addressing
addressing
master and slaves
used as a handshake mechanism to suspend and
resume serial transfer (SCLREL control)
collision and arbitrates accordingly
2
2
2
2
2
Note 1: This data sheet summarizes the features
C interface supporting both Master and Slave
C Slave mode supports 7-bit and 10-bit
C Master mode supports 7-bit and 10-bit
C port allows bidirectional transfers between
C supports multi-master operation, detects bus
2
2
C module has a 2-pin interface:
C module offers the following key features:
2: Some registers and associated bits
INTER-INTEGRATED
CIRCUIT™ (I
PIC24HJ32GP202/204 AND PIC24HJ16GP304
of
PIC24HJ16GP304 family of devices.
However, it is not intended to be a com-
prehensive reference source. To comple-
ment the information in this data sheet,
refer to “Section 19. Inter-Integrated
Circuit™ (I
“dsPIC33Fj/PIC24H Family Reference
Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
the
PIC24HJ32GP202/204
2
C™)” (DS70195) of the
2
C™)
2
C serial communication
2
C) module provides
2
C port can be
and
in
16.1
The hardware fully implements all the master and slave
functions of the I
specifications, as well as 7 and 10-bit addressing.
The I
master on an I
The following types of I
• I
• I
• I
For details about the communication sequence in each
of these modes, refer to the “dsPIC33F/PIC24H Family
Reference Manual”.
16.2
I2CxCON and I2CxSTAT are control and status
registers, respectively. The I2CxCON register is
readable and writable. The lower six bits of I2CxSTAT
are read-only. The remaining bits of the I2CSTAT are
read/write.
• I2CxRSR is the shift register used for shifting data
• I2CxRCV is the receive buffer and the register to
• I2CxTRN is the transmit register to which bytes
• The I2CxADD register holds the slave address
• A status bit, ADD10, indicates 10-bit Address
• I2CxBRG acts as the Baud Rate Generator
In receive operations, I2CxRSR and I2CxRCV together
form a double-buffered receiver. When I2CxRSR
receives a complete byte, it is transferred to I2CxRCV,
and an interrupt pulse is generated.
which data bytes are written, or from which data
bytes are read
are written during a transmit operation
mode
(BRG) reload value
2
2
2
C slave operation with 7-bit addressing
C slave operation with 10-bit addressing
C master operation with 7-bit or 10-bit addressing
2
C module can operate either as a slave or a
Operating Modes
I
2
C Registers
2
C bus.
2
C Standard and Fast mode
2
C operation are supported:
DS70289G-page 143

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