PIC24HJ32GP202-E/MM Microchip Technology, PIC24HJ32GP202-E/MM Datasheet - Page 25

16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE

PIC24HJ32GP202-E/MM

Manufacturer Part Number
PIC24HJ32GP202-E/MM
Description
16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ32GP202-E/MM

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.0
The PIC24HJ32GP202/204 and PIC24HJ16GP304
architecture features separate program and data
memory spaces and buses. This architecture also
allows the direct access of program memory from the
data space during code execution.
FIGURE 4-1:
© 2011 Microchip Technology Inc.
Note:
MEMORY ORGANIZATION
PIC24HJ32GP202/204 AND PIC24HJ16GP304
This data sheet summarizes the features
of
PIC24HJ16GP304 family of devices.
However, it is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to the “dsPIC33F/PIC24H
Family Reference Manual”, “Section 4.
Program Memory” (DS70202), which is
available from the Microchip website
(www.microchip.com).
the
PIC24HJ32GP202/204
Interrupt Vector Table
Alternate Vector Table
Device Configuration
(11264 instructions)
PROGRAM MEMORY FOR PIC24HJ32GP202/204 AND PIC24HJ16GP304 DEVICES
GOTO Instruction
Unimplemented
Reset Address
Flash Memory
User Program
(Read ‘0’s)
Reserved
DEVID (2)
Registers
Reserved
Reserved
PIC24HJ32GP202/204
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x0057FE
0x005800
0x7FFFFE
0x800000
0xF7FFFE
0xF80017
0xF80018
0xFEFFFE
0xFF0000
0xFFFFFE
0xF80000
and
4.1
The
PIC24HJ32GP202/204
devices is 4M instructions. The space is addressable
by a 24-bit value derived either from the 23-bit Program
Counter (PC) during program execution, or from table
operation or data space remapping as described in
Section 4.4 “Interfacing Program and Data Memory
Spaces”.
User application access to the program memory space
is restricted to the lower half of the address range
(0x000000 to 0x7FFFFF). The exception is the use of
TBLRD/TBLWT operations, which use TBLPAG<7> to
permit access to the Configuration bits and Device ID
sections of the configuration memory space.
The memory maps for the PIC24HJ32GP202/204 and
PIC24HJ16GP304 devices are shown in
program
Program Address Space
Interrupt Vector Table
Alternate Vector Table
Device Configuration
PIC24HJ16GP304
(5632 instructions)
GOTO Instruction
Unimplemented
Reset Address
address
Flash Memory
User Program
(Read ‘0’s)
Reserved
Registers
DEVID (2)
Reserved
Reserved
and
memory
PIC24HJ16GP304
DS70289G-page 25
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x002BFE
0x002C00
0x7FFFFE
0x800000
0xF7FFFE
0xF80017
0xF80018
0xFEFFFE
0xFF0000
0xFFFFFE
0xF80000
space
Figure
4-1.
of
the

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