PIC18LF13K50T-I/SS Microchip Technology, PIC18LF13K50T-I/SS Datasheet - Page 9

8 KB Flash, 512 RAM, 15 I/O, 10-bit ADC, USB 2.0, NanoWatt XLP 20 SSOP .209in T/

PIC18LF13K50T-I/SS

Manufacturer Part Number
PIC18LF13K50T-I/SS
Description
8 KB Flash, 512 RAM, 15 I/O, 10-bit ADC, USB 2.0, NanoWatt XLP 20 SSOP .209in T/
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18LF13K50T-I/SS

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.2
Figure 3-4 shows the high-level overview of the
programming process. First, a Bulk Erase is performed.
Next, the program Flash, ID locations and data
EEPROM are programmed. These memories are then
verified to ensure that programming was successful. If
no errors are detected, the Configuration bits are then
programmed and verified.
FIGURE 3-4:
 2010 Microchip Technology Inc.
High-Level Overview of the
Programming Process
Program Data EE
Configuration Bits
Program Memory
Configuration Bits
Verify Program
Perform Bulk
Program IDs
Verify Data
Verify IDs
Program
HIGH-LEVEL
PROGRAMMING FLOW
Erase
Verify
Done
Start
PIC18F1XK50/PIC18LF1XK50
Advance Information
3.3
As shown in Figure 3-6, the High-Voltage ICSP
Program/Verify mode is entered by holding PGC and
PGD low and then raising MCLR/V
(high voltage). Once in this mode, the program Flash,
data EEPROM, ID locations and Configuration bits can
be accessed and programmed in serial fashion.
Figure 3-7 shows the exit sequence.
The sequence that enters the device into the Program/
Verify mode places all unused I/Os in the high-impedance
state.
FIGURE 3-5:
FIGURE 3-6:
MCLR/V
V
PGD
PGC
MCLR/V
V
PGD
PGC
Note:
DD
DD
Entering and Exiting High-Voltage
ICSP Program/Verify Mode
D110
D110
PP
PP
/RA3
/RA3
This method of entry is valid, regardless
of Configuration Word selected.
P1
PGD = Input
PGD = Input
P13
V
VERIFY MODE ENTRY
V
VERIFY MODE ENTRY
P1
PP
DD
P13
-FIRST PROGRAM/
-FIRST PROGRAM/
P12
P12
DS41342E-page 9
PP
/RA3 to V
IHH

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