PIC18LF13K50T-I/SS Microchip Technology, PIC18LF13K50T-I/SS Datasheet - Page 21

• Manufacturer Part Number: PIC18LF13K50T-I/SS
• Description: 8 KB Flash, 512 RAM, 15 I/O, 10-bit ADC, USB 2.0, NanoWatt XLP 20 SSOP .209in T/
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF13K50T-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.4
The ID locations are programmed much like the
program Flash. The ID registers are mapped in
addresses 200000h through 200007h. These locations
read out normally even after code protection.
TABLE 4-8:
4.5
The code sequence detailed in Table 4-5 should be
used, except that the address used in “Step 2” will be in
the range of 000000h to 0007FFh.
 2010 Microchip Technology Inc.
Step 1: Direct access to program Flash.
0000
0000
0000
Step 2: Set Table Pointer to ID. Load write buffer with 8 bytes and write.
0000
0000
0000
0000
0000
0000
1101
1101
1101
1111
0000
Note:
Command
4-bit
ID Location Programming
Boot Block Programming
The user only needs to fill the first 8 bytes
of the write buffer, in order to write the ID
locations.
WRITE ID SEQUENCE
<MSB><LSB>
<MSB><LSB>
<MSB><LSB>
<MSB><LSB>
Data Payload
8E A6
9C A6
6E F8
6E F7
6E F6
84 A6
0E 20
0E 00
0E 00
00 00
PIC18F1XK50/PIC18LF1XK50
BSF EECON1, EEPGD
BCF EECON1, CFGS
BSF EECON1, WREN
MOVLW 20h
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 00h
MOVWF TBLPTRL
Write 2 bytes and post-increment address by 2.
Write 2 bytes and post-increment address by 2.
Write 2 bytes and post-increment address by 2.
Write 2 bytes and start programming.
NOP - hold PGC high for time P9 and low for time P10.
Advance Information
Table 4-8 demonstrates the code sequence, required
to write the ID locations.
In order to modify the ID locations, refer to the
methodology described in Section 4.2.1 “Modifying
Program Flash”. As with program Flash, the ID
locations must be erased before being modified.
4.6
Unlike program Flash, the Configuration bits are
programmed a byte at a time. The Table Write, Begin
Programming 4-bit command (‘1111’) is used, but only
8 bits of the following 16-bit payload will be written. The
LSB of the payload will be written to even addresses
and the MSB will be written to odd addresses. The
code
configuration locations is shown in Table 4-9. See
Figure 4-5 for the timing diagram.
Note:
Core Instruction
sequence
Configuration Bits Programming
The address must be explicitly written for
each byte programmed. The addresses
cannot be incremented in this mode.
to
program
two
DS41342E-page 21
consecutive