PIC18LF13K50T-I/SS Microchip Technology, PIC18LF13K50T-I/SS Datasheet - Page 36

• Manufacturer Part Number: PIC18LF13K50T-I/SS
• Description: 8 KB Flash, 512 RAM, 15 I/O, 10-bit ADC, USB 2.0, NanoWatt XLP 20 SSOP .209in T/
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF13K50T-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F1XK50/PIC18LF1XK50
8.1
DS41342E-page 36
Standard Operating Conditions
Operating Temperature: 25C is recommended
Param
P11A
P12
P12A
P13
P13A
P14
P15
P16
P17
P18
P19
P20
Note 1:
No.
T
T
T
T
T
T
T
T
T
T
T
T
AC/DC Characteristics Timing Requirements for Program/Verify Test Mode
Sym.
DRWT
HLD
HLD
SET
SET
VALID
SET
DLY
HLD
HLD
HIZ
PPDP
Do not allow excess time when transitioning MCLR between V
executions to occur. The maximum transition time is:
1 T
only) + 1.5 s (for EC mode only) where T
and T
data sheet for the particular device.
2
2
3
8
2
2
3
4
A
A
CY
Data Write Polling Time
Input Data Hold Time from MCLR/V
Input Data Hold Time from MCLR/V
V
V
Data Out Valid from PGC 
PGM Setup Time to MCLR/V
Delay between Last PGC  and MCLR/V
MCLR/V
MCLR/V
Delay from PGC to PGD High-Z
Hold time after V
OSC
+ T
DD
DD
PWRT
Setup Time to MCLR/V
Setup Time to MCLR/V
is the oscillator period. For specific values, refer to the Electrical Characteristics section of the device
PP
PP
(if enabled) + 1024 T
/RA3 to V
/RA3 to PGM 
PP
Characteristic
changes
DD

Advance Information
PP
PP
OSC
PP
/RA3 
/RA3 
/RA3 
PP
PP
(for LP, HS, HS/PLL and XT modes only) + 2 ms (for HS/PLL mode
CY
/RA3 
/RA3 
is the instruction cycle time, T
PP
/RA3 
Min.
100
70
70
10
—
4
2
2
0
0
3
5
IL
and V
IHH
Max.
100
—
—
—
—
—
—
—
—
—
10
—
; this can cause spurious program
PWRT
Units
 2010 Microchip Technology Inc.
ms
is the Power-up Timer period
nS
s
s
ns
s
ns
s
ns
s
s
s
PIC18F1XK50 Only.
Refer to Figure 2-1.
PIC18F1XK50 Only.
Refer to Figure 2-1.
Conditions