PIC18LF13K50T-I/SS Microchip Technology, PIC18LF13K50T-I/SS Datasheet - Page 11

• Manufacturer Part Number: PIC18LF13K50T-I/SS
• Description: 8 KB Flash, 512 RAM, 15 I/O, 10-bit ADC, USB 2.0, NanoWatt XLP 20 SSOP .209in T/
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF13K50T-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.5
The PGC pin is used as a clock input pin and the PGD
pin is used for entering command bits and data input/
output during serial operation. Commands and data are
transmitted on the rising edge of PGC, latched on the
falling edge of PGC, and are Least Significant bit (LSb)
first.
3.5.1
All instructions are 20 bits, consisting of a leading 4-bit
command, followed by a 16-bit operand, which
depends on the type of command being executed. To
input a command, PGC is cycled four times. The
commands needed for programming and verification
are shown in Table 3-2.
Depending on the 4-bit command, the 16-bit operand
represents 16 bits of input data or 8 bits of input data,
and 8 bits of output data.
Throughout this specification, commands and data are
presented as illustrated in Table 3-3. The 4-bit
command, Most Signification bit (MSb), is shown first.
The command operand, or “Data Payload”, is shown
<MSB><LSB>. Figure 3-10 demonstrates how to
serially present a 20-bit command/operand to the
device.
FIGURE 3-10:
 2010 Microchip Technology Inc.
PGC
PGD
Serial Program/Verify Operation
4-BIT COMMANDS
P3
4-bit Command
1
P2
1
2
P4
0
TABLE WRITE, POST-INCREMENT TIMING DIAGRAM (1101)
3
1
4
1
P2A
P5
P2B
1
0
2
0
PIC18F1XK50/PIC18LF1XK50
0
3
0
Advance Information
4
0
5
0
6
PGD = Input
0
16-bit Data Payload
4
7
1
8
0
3.5.2
The core instruction passes a 16-bit instruction to the
CPU core for execution. This is needed to set up
registers as appropriate for use with other commands.
TABLE 3-2:
TABLE 3-3:
Core Instruction
(Shift in16-bit instruction)
Shift out TABLAT register
Table Read
Table Read, post-increment
Table Read, post-decrement
Table Read, pre-increment
Table Write
Table Write, post-increment by 2
Table Write, start programming,
post-increment by 2
Table Write, start programming
9
Command
0
1101
10
4-Bit
0
C
11
1
12
CORE INSTRUCTION
1
Description
Payload
13
3C 40
1
Data
14
COMMANDS FOR
PROGRAMMING
SAMPLE COMMAND
SEQUENCE
1
3
15
0
Table Write,
post-increment by 2
16
0
P5A
Fetch Next 4-bit Command
Core Instruction
1
n
DS41342E-page 11
2
n
3
n
Command
4
0000
0010
1000
1001
1010
1011
1100
1101
1110
1111
4-Bit
n