82V2042EPF8 IDT, Integrated Device Technology Inc, 82V2042EPF8 Datasheet - Page 60
82V2042EPF8
Manufacturer Part Number
82V2042EPF8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V2042EPF8.pdf
(83 pages)
Specifications of 82V2042EPF8
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
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Table-51 Hardware Control Pin Summary (Continued)
HARDWARE CONTROL PIN SUMMARY
IDT82V2042E
Pin No.
TQFP
19
18
42
41
44
43
20
11
58
60
Symbol
MONT1
MONT2
RCLKE
LP11
LP10
LP21
LP20
THZ
-
MONTn: Receive Monitor n gain select (per channel control)
In hardware control mode with ternary interface, this pin selects the receive monitor gain for receiver n (n=1 or 2)
0= 0 dB
1= 26 dB
LPn[1:0]: Loopback mode select (per channel control)
When the chip is configured by hardware, these pins are used to select loopback operation modes for channel n (Inband loopback
is not provided in hardware control mode).
00= no loopback
01= analog loopback
10= digital loopback
11= remote loopback
THZ: Transmitter Driver High Impedance Enable (global control)
This signal enables or disables both of the transmitter drivers. A low level on this pin enables both of the two drivers while a high
level on this pin places both of the two drivers in high impedance state.
RCLKE: the active edge of RCLKn select when hardware control mode is used (global control)
0= select the rising edge as active edge of RCLKn
1= select the falling edge as active edge of RCLKn
In Hardware mode, these pins have to be tied to GND.
DUAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
60
Description
December 12, 2005
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