82V2042EPF8 IDT, Integrated Device Technology Inc, 82V2042EPF8 Datasheet - Page 25
82V2042EPF8
Manufacturer Part Number
82V2042EPF8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V2042EPF8.pdf
(83 pages)
Specifications of 82V2042EPF8
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
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select impedance matching for both receiver and transmitter on a per chan-
nel basis. If TERMn pin is low, internal impedance network will be used. If
TERMn pin is high, external impedance network will be used in E1 mode,
or external impedance network for receiver and internal impedance net-
work for transmitter will be used in T1/J1 mode. (This applies to ZB die revi-
sion only). When internal impedance network is used, PULSn[3:0] pins
should be set to select specific internal impedance for the corresponding
channel. Refer to
3.4.2
ing on channels located in other chips can be performed by tapping the mon-
itored channel through a high impedance bridging circuit. Refer to
9
RRINGn is dramatically attenuated. To compensate this attenuation, the
Monitor Gain can be used to boost the signal by 22 dB, 26 dB and 32 dB,
selected by MG[1:0] bits (RCF2, 0BH...). For normal operation, the Monitor
Gain should be set to 0 dB.
Gain on a per channel basis. When MONTn pin is low, the Monitor Gain for
the specific channel is 0 dB. When MONTn pin is high, the Monitor Gain for
the specific channel is 26 dB. Refer to
MARY
FUNCTIONAL DESCRIPTION
IDT82V2042E
and Figure-10.
In hardware control mode, TERMn, PULSn[3:0] pins can be used to
In both T1/J1 and E1 short haul applications, the non-intrusive monitor-
After a high resistance bridging circuit, the signal arriving at the RTIPn/
In hardware control mode, MONTn pin can be used to set the Monitor
for details.
LINE MONITOR
5 HARDWARE CONTROL PIN SUMMARY
5 HARDWARE CONTROL PIN SUM-
for details.
Figure-
DUAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
25
Figure-9 Monitoring Receive Line in Another Chip
Figure-10 Monitor Transmit Line in Another Chip
DSX cross connect
DSX cross connect
point
point
R
R
TTIP
TRING
RTIP
RRING
RRING
RRING
RTIP
RTIP
December 12, 2005
=22/26/32dB
monitor gain
monitor gain
normal transmit mode
normal receive mode
gain=0dB
monitor gain
=22/26/32dB
monitor
monitor mode
monitor mode
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