82V2042EPF8 IDT, Integrated Device Technology Inc, 82V2042EPF8 Datasheet - Page 12
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82V2042EPF8
Manufacturer Part Number
82V2042EPF8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V2042EPF8.pdf
(83 pages)
Specifications of 82V2042EPF8
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
Table-1 Pin Description (Continued)
PIN DESCRIPTION
IDT82V2042E
RXTXM1
RXTXM0
MODE1
MODE0
RCLKE
Name
LP11
LP10
INT
CS
Type
O
I
I
I
I
I
Pin No.
10
14
15
42
41
11
9
MODE[1:0]: operation mode of control interface select
The level on this pin determines which control mode is used to control the device as follows:
•
•
•
RCLKE: the active edge of RCLKn select
In hardware control mode, this pin selects the active edge of RCLKn
•
•
In software control mode, this pin should be connected to GNDIO.
RXTXM[1:0]: Receive and transmit path operation mode select
In hardware control mode, these pins are used to select the single rail or dual rail operation modes as well as AMI or HDB3/
B8ZS line coding:
•
•
•
•
In software control mode, these pins should be connected to ground.
CS: Chip Select
In serial or parallel microcontroller interface mode, this is the active low enable signal. A low level on this pin enables serial
or parallel microcontroller interface.
LP11/LP10: Loopback mode select for channel 1
When the chip is configured by hardware, this pin is used to select loopback operation modes for channel 1 (Inband Loopback
is not provided in hardware control mode).
•
•
•
•
INT: Interrupt Request
In software control mode, this pin outputs the general interrupt request for all interrupt sources. If INTM_GLB bit (GCF, 20H)
is set to ‘1’, all the interrupt sources will be masked. These interrupt sources can be masked individually via registers (INTM0,
13H...) and (INTM1, 14H...). The interrupt status is reported via the registers (INTCH, 21H), (INTS0, 18H...) and (INTS1,
19H...).
Output characteristics of this pin can be defined to be push-pull (active high or active low) or open-drain (active low) by setting
bits INT_PIN[1:0] (GCF, 20H)
LP11/LP10: Loopback mode select for channel 1
See above LP11.
The serial microcontroller interface consists of CS, SCLK, SCLKE, SDI, SDO and INT pins. SCLKE is used for the
selection of the active edge of SCLK.
The parallel non-multiplexed microcontroller interface consists of CS, A[5:0], D[7:0], DS/RD, R/W/WR and INT pins.
(Refer to
Hardware interface consists of PULSn[3:0], THZ, RCLKE, LPn[1:0], PATTn[1:0], JA[1:0], MONTn, TERMn, RPDn,
MODE[1:0] and RXTXM[1:0] (n=1, 2).
L= update RDPn/RDNn on the rising edge of RCLKn
H= update RDPn/RDNn on the falling edge of RCLKn
00= single rail with HDB3/B8ZS coding
01= single rail with AMI coding
10= dual rail interface with CDR enabled
11= slicer mode (dual rail interface with CDR disabled)
00 = no loopback
01 = analog loopback
10 = digital loopback
11 = remote loopback
3.12 MICROCONTROLLER INTERFACES
MODE[1:0]
00
01
10
11
DUAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
12
Serial Microcontroller Interface
Motorola non-multiplexed
Intel non-multiplexed
Hardware interface
Control Interface mode
Description
for details)
December 12, 2005