IDT77V1253L25PGI IDT, Integrated Device Technology Inc, IDT77V1253L25PGI Datasheet - Page 6

• Manufacturer Part Number: IDT77V1253L25PGI
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT77V1253L25PGI

• Data Rate: 25.6/51.2Mbps
• Number Of Channels: 3
• Type Of Atm Phy Interface: DPI/UTOPIA
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Pin Count: 144
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6
AND 51.2 MBPS ATM NETWORKS
TABLE 1 — SIGNAL DESCRIPTIONS (CONTINUED):
TABLE 2 — SIGNAL ASSIGNMENT AS A FUNCTION OF PHY/ATM INTERFACE
MODE:
SIGNAL NAME
SIGNAL NAME
Pn_TD[3:0]
Pn_PFRM
Pn_TFRM
Pn_TCLK
TXDATA10
TXDATA12
TXDATA11
TXDATA0
TXDATA1
TXDATA2
TXDATA3
TXDATA4
TXDATA5
TXDATA6
TXDATA7
TXDATA8
TXDATA9
TXLED2
TXLED0
MODE0
RXREF
TXLED1
MODE1
TXREF
TX0+
VDD
GND
TX0-
VDD
GND
DNC
VDD
MM
PIN NUMBER
28, 27, 26, 25,
24, 23, 22, 21,
PIN NUMBER
20, 19, 18, 17
36, 33, 34, 35
58, 54, 55
39, 40, 41
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
11
2
3
4
5
6
7
8
9
1
16-BIT UTOPIA 2
MODE[1,0] = 00
Out
Out
I/O
In
In
TXDATA10
TXDATA12
TXDATA11
TXDATA0
TXDATA2
TXDATA3
TXDATA4
TXDATA5
TXDATA6
TXDATA7
TXDATA8
TXDATA9
TXDATA1
6
DPI Port 'n' Receive Frame. Pn_RFRM is asserted for one cycle
immediately p receding the transfer of each cell on Pn_RD[3:0].
DPI Port 'n' Transmit Clock. Pn_TCLK is derrived from DPICLK and is
cycled when the respective port is ready to accept another 4 bits of data
on Pn_TD[3:0].
DPI Port 'n' Transmit Data. Cells are passed across this bus to the PHY
DPI Port 'n' Transmit Frame. Start of cell signal which is asserted for one
cycle immediately preceding the first 4 bits of each cell on Pn_TD[3:0].
for transmission on port 'n'. Each port has its own dedicated bus.
8-BIT UTOPIA 1
MODE[1,0] = 01
see note 2
see note 2
see note 2
TXDATA0
TXDATA2
TXDATA3
TXDATA4
TXDATA5
TXDATA6
TXDATA7
TXDATA1
TXEN[1]
TXEN[2]
SIGNAL DESCRIPTION
MODE[1,0] = 10
see note 2
P0_TD[0]
P0_TD[1]
P0_TD[2]
P0_TD[3]
P1_TD[0]
P1_TD[1]
P1_TD[2]
P1_TD[3]
P2_TD[0]
P2_TD[1]
P2_TD[2]
P2_TD[3]
DPI
IDT77V1253
4781 tbl 05
4781 tbl 04