IDT77V1253L25PGI IDT, Integrated Device Technology Inc, IDT77V1253L25PGI Datasheet
IDT77V1253L25PGI
Specifications of IDT77V1253L25PGI
Related parts for IDT77V1253L25PGI
IDT77V1253L25PGI Summary of contents
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FEATURES: • • • • • Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for three 25.6 Mbps ATM channels • • • • • Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5 specifications for 25.6 ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS PIN CONFIGURATION: VDD 1 GND 2 TX0- 3 TX0+ 4 VDD MODE1 7 MODE0 8 RXREF 9 TXREF 10 GND 11 DNC 12 TXLED2 13 ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS TABLE 1 — SIGNAL DESCRIPTIONS SIGNAL NAME RX0+,- RX1+,- RX2+,- TX0+,- TX1+,- TX2+,- SIGNAL NAME AD[7:0] 101, 100, 99, 98, ALE SIGNAL NAME DA DNC ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS TABLE 1 — SIGNAL DESCRIPTIONS (CONTINUED): SIGNAL NAME RXREF SE TXLED[2:0] TXREF SIGNAL NAME AGND 112, 117, 118, 123, 124, 127, 129, 130, AVDD 113, 116, 119, 122, ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS TABLE 1 — SIGNAL DESCRIPTIONS (CONTINUED): SIGNAL NAME TXCLK TXDATA[15:0] 27, 26, 25, 24, 23, 22, TXEN TXPARITY TXSOC SIGNAL NAME RXCLAV[2:0] RXCLK RXDATA[7:0] RXEN[2:0] RXPARITY RXSOC TXCLAV[2:0] ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS TABLE 1 — SIGNAL DESCRIPTIONS (CONTINUED): SIGNAL NAME PIN NUMBER Pn_PFRM Pn_TCLK Pn_TD[3:0] 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17 Pn_TFRM 36, 33, ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS TABLE 2 — SIGNAL ASSIGNMENT AS A FUNCTION OF PHY/ATM INTERFACE MODE (CONTINUED): SIGNAL NAME TXDATA13 TXDATA14 TXDATA15 TXPARITY TXEN TXSOC TXADDR4 TXADDR3 VDD TXADDR2 TXADDR1 TXADDR0 TXCLAV ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS TABLE 2 — SIGNAL ASSIGNMENT AS A FUNCTION OF PHY/ATM INTERFACE MODE (CONTINUED): SIGNAL NAME RXDATA0 GND VDD RXLED0 RXLED1 RXLED2 DNC GND VDD INT GND RST WR ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS TABLE 2 — SIGNAL ASSIGNMENT AS A FUNCTION OF PHY/ATM INTERFACE MODE (CONTINUED): SIGNAL NAME PIN NUMBER AVDD AGND AGND AVDD OSC AGND AVDD AGND AGND AVDD RX1- ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS 77V1253 OVERVIEW: The 77V1253 is a three-port implementation of the physical layer standard for 25.6Mbps ATM network communications as defined by ATM Forum document af-phy-040.000 and ITU-T I.432.5. ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS DPICLK Mode[1:0] P0_TCLK P0_TFRM P0_TD[3:0] P0_RCLK P0_RFRM P0_RD[3:0] P1_TCLK P1_TFRM P1_TD[3:0] DPI Multi-PHY P1_RCLK Interface P1_RFRM P1_RD[3:0] P2_TCLK P2_TFRM P2_TD[3:0] P2_RCLK P2_RFRM P2_RD[3:0] INT RST RD Microprocessor WR ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS FUNCTIONAL DESCRIPTION TRANSMISSION CONVERGENCE (TC) SUB LAYER Introduction The TC sub layer defines the line coding, scrambling, data framing and synchronization. Under control of a switch interface or ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS Transmission Description Refer to Figure 4 on the previous page. Cell transmission begins with the PHY-ATM Interface. An ATM layer device transfers a cell into the 77V1253 across ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS Receiver Description The receiver side of the TC sublayer operates like the transmitter, but in reverse. The data is NRZI decoded before each symbol is reassembled. The symbols ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS To declare 'Bad Signal' (from "Good" to "Bad"): The same up-down counter counts from (being provide a "Good" status). When the clock ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS PHY-ATM Interface The 77V1253 PHY offers three choices in interfacing to ATM layer devices such as segmentation and reassembly (SAR) and switching chips. MODE[1:0] are used to select ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS polling: TxCLK TxADDR[4:0] 1F N+3 High-Z TxCLAV N+1 TxEN TxData[15:0], P39, 40 P41, 42 TxPARITY TxSOC cell transmission to: Figure 8. Utopia 2 Transmit Handshake - Back to ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS polling: TxCLK TxADDR[4:0] 1F N+3 High-Z TxCLAV N+1 TxEN TxData[15:0], P25, 26 P27, 28 TxPARITY TxSOC PHY M cell transmission to: Figure 10. Utopia 2 Transmit Handshake - ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS polling polling: RxCLK RxADDR[4:0] N+3 1F RxCLAV N+3 RxEN RxData[15:0], P45, 46 P47, 48 RxPARITY RxSOC PHY N+3 cell transmission to: Figure 12. Utopia 2 Receive Handshake - ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS UTOPIA LEVEL 1 MULTI-PHY INTERFACE OPTION The UTOPIA Level 1 MULTI-PHY interface operates as defined in ATM Forum document af-phy-0017 and clarified in af-phy-0039. Utopia Level 1 is ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS TxCLK TxCLAV[2:0] TxEN[2:0] TxDATA[7:0], P46 P47 TxPARITY TxSOC Figure 16. Utopia 1 Transmit Handshake - Back-to-Back Cells, and TXEN Suspended Transmission TxCLK TxCLAV[2:0] TxEN[2:0] TxDATA[7:0], P42 P43 TxPARITY ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS RxCLK RxCLAV[2:0] RxEN[2:0] RxDATA[7:0], P47 P48 RxPARITY RxSOC Figure 19. Utopia 1 Receive Handshake - RXEN and RXCLAV Control RxCLK RxCLAV[2:0] RxEN[2:0] High-Z RxDATA[7:0], P42 RxPARITY High-Z RxSOC ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS DPI INTERFACE OPTION The DPI interface is relatively new and worth additional description. The biggest difference between the DPI configurations and the UTOPIA configurations is that each channel ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS P_RCLK (in) P_RFRM (out) P_RD(3:0) X (out) P_RCLK (in) P_RFRM (out) P_RD(3:0) X (out) P_RCLK (in) P_RFRM (out) Cell 1 Cell 1 P_RD(3:0) (out) Nibble 104 Nibble 105 ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS P_RCLK (in) P_RFRM (out) Cell 1 Cell 1 P_RD(3:0) (out) Nibble 104 Nibble 105 P_TCLK (out) P_TFRM (in) P_TD(3: (in) Figure 27. DPI Transmit Handshake - ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS P_TCLK (out) P_TFRM (in) Cell 1 Cell 1 P_TD(3:0) (in) Nibble 104 Nibble 105 Figure 29. DPI Transmit Handshake - 77V1254 Transmit FIFO Full P_TCLK (out) P_TFRM (in) ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS CONTROL AND STATUS INTERFACE UTILITY BUS The Utility Bus is a byte-wide interface that provides access to the registers within the IDT77V1253. These registers are used to select ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS DIAGNOSTIC FUNCTIONS 1. LOOPBACK There are two loopback modes supported by the 77V1253. The loopback mode is controlled via bits 1 and 0 of the Diagnostic Control Registers: ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS ATM Layer Utopia/DPI Device Interface 2. COUNTERS Several condition counters are provided to assist external systems (e.g. software drivers) in evaluating communications conditions anticipated that these ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS LINE SIDE (SERIAL) INTERFACE Each of the four ports has two pins for differential serial transmission, and two pins for differential serial receiving. PHY TO MAGNETICS INTERFACE A ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS STATUS AND CONTROL REGISTER LIST The 77V1253 has 28 registers that are accessible through the utility bus. Each of the three ports has 9 registers dedicated to that ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS INTERRUPT STATUS REGISTERS Addresses: 0x01, 0x11, 0x21 Bit Type Initial State Bad Signal 5 sticky 0 4 sticky 0 3 sticky ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS LED DRIVER AND HEC STATUS/CONTROL REGISTERS Addresses: 0x03, 0x13, 0x23 Bit Type Initial State R enable checking 5 R enable calculate ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS INTERRUPT MASK REGISTERS Addresses: 0x07, 0x17, 0x27 Bit Type Initial State R interrupt enabled HEC Error Cell ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS ABSOLUTE MAXIMUM RATINGS Symbol Rating V Terminal Voltage TERM with Respect to GND T Temperature BIAS Under Bias Storage T STG Temperature I DC Output Current OUT NOTE: ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS UTOPIA LEVEL 2 BUS TIMING PARAMETERS Symbol t1 TxCLK Frequency t2 TxCLK Duty Cycle (% of t1) t3 TxDATA[15:0], TxPARITY Setup Time to TxCLK t4 TxDATA[15:0], TxPARITY Hold ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS RxCLK t 14 RxEN t 16 RxADDR[4:0] High-Z RxCLAV High-Z RxSOC RxDATA[15:0], High-Z RxPARITY UTOPIA LEVEL 1 BUS TIMING PARAMETERS Symbol t31 TxCLK Frequency t32 TxCLK Duty Cycle ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS t 33 TxCLK TxDATA[7:0], Octet 1 TxPARITY t 35 TxSOC TxEN[2:0] TxCLAV[2:0] RxCLK t 41 RxEN[2:0] RxCLAV[2:0] High-Z RxSOC High-Z RxDATA[7:0], RxPARITY t 34 Octet ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS DPI BUS TIMING PARAMETERS Symbol t51 DPICLK Frequency t52 DPICLK Duty Cycle (% of t31) t53 DPICLK to Pn_TCLK Propagation Delay t54 Pn_TFRM Setup Time to Pn_TCLK t55 ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS UTILITY BUS READ CYCLE Name Min Max Unit ____ Tas 10 ns Address setup to ALE Tcsrd 0 ____ ns Chip select to read enable Tah 5 ____ ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS OSC, RXREF, TXREF AND RESET TIMING Symbol Tcyc OSC cycle period (25.6 Mbps) (51.2 Mbps) Tch OSC high time Tcl OSC low time Tcc OSC cycle to cycle ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS A note about Figures 46 and 47: The ATM Forum and ITU-T standards for 25 Mbps ATM define "Network" and "User" interfaces. They are identical except that transmit ...
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TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS Package Dimensions 144 1 144-Lead PQFP PU-144 4.4319 ' D 5.5125 ' PSC-4053 is a more comprehensive package outline drawing which is available from the ...
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Ordering Information IDT NNNNN A Device Type Power Preliminary Datasheet: Definition "PRELIMINARY' datasheets contain descriptions for products soon to be, or recently released to production, including features, pinouts and block diagrams. Timing data are based on simulation or initial characterization ...