MSC8144ADS Freescale, MSC8144ADS Datasheet - Page 51

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MSC8144ADS

Manufacturer Part Number
MSC8144ADS
Description
Manufacturer
Freescale
Datasheet

Specifications of MSC8144ADS

Lead Free Status / RoHS Status
Compliant
5.14.5 BCSR4 Board Control Register 4
On the board, the BCSR4 acts as a control register. The BCSR4, which may be read or written at
any time, receives its defaults upon Power-On-Reset. The BCSR4 fields are described below in
Table 5-13:
Freescale Semiconductor
BIT
0-2
6-7
BIT
3
4
5
4
5
6
7
TDMDIV
TDMx4
GETHEN
RSRV4
IND
MNEMONIC
PTMCCTRL1
PTMCCTRL2
MNEMONIC
JTAGCHN
AMCCLK
Table 5-13. BCSR4 Description MSC8144 Special Function 2 (Offset 4)
Table 5-12. BCSR3 Special Function 1 (Offset 3) (Continued)
TDM Clock Divider. Three bits set TDM clock divider. See coding Table
5-14 below.
TDM Mux Enable. Low sets TDM mux to narrow port mode. High provides
selection for full eight TDM ports wide. The bit is not relevant for external
pins configuration mode.
GETH Enable. Low enables GETH bus switches. When high GETH bus
switches are disabled.
Indication. Low illuminates the appropriate LED “IND”. When high, the
LED is dark
Reserved
AMC Clock Select. A low value for this bit means that when the ADS
works as an AMC card the CLOCK1 coming from the ATCA carrier will
be directed to the MSC8144 TIMER0 input. When high, CLOCK2 is
selected.
JTAG Chain Select. High means ‘Single’ chip JTAG configuration.
When Low ‘Chain’ JTAG configuration is selected.
PTMC Control 1. PTMC User defined control1 signal. The signal
reflects bit value.
PTMC Control 2. PTMC User defined control2 signal. The signal
reflects bit value.
TDMDIV[0–2]
Table 5-14. TDM Clock Divider
0,5–7
MSC8144ADS MSC8144, Rev. 0
1
2
3
4
Function
Function
Frequency
Disabled
16 MHz
8 MHz
4 MHz
2 MHz
Board Control and Status Registers (BCSRs)
DEF on
DEF on
SW2.3
PRST
PRST
‘000’
‘11’
0
1
1
1
0
1
ATT.
R,W
R,W
R,W
ATT.
R,W
R,W
R,W
R,W
R,W
R
5-27