STLC5466 STMicroelectronics, STLC5466 Datasheet - Page 31

no-image

STLC5466

Manufacturer Part Number
STLC5466
Description
RF Wireless Misc Multi-HDLC Sw Matrix
Manufacturer
STMicroelectronics
Type
Telecom ICr
Datasheets

Specifications of STLC5466

Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-176
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STLC5466
Manufacturer:
ST
0
VI - INTERNAL REGISTERS
‘Not used’ bits (Nu) are accessible by the microprocessor but the use of these bits by software is not rec-
ommended.
‘Reserved’ bits are not implemented in the circuit. However, it is not recommended to use these bits.
VI.1 - Identification and Dynamic Command Register
When this register is read by the microprocessor, the circuit code C0/15 is returned. Reset has no effect
on this register.
C0/3 indicates the version.
C4/7 indicates the revision.
C8/11 indicates the foundry.
C12/15 indicates the type.
Example: this code is (0010)
When this register is written by the microprocessor then:
TL
WDR : WATCHDOG RESET.
RSS : RESET SOFTWARE
After writing this register, the values of these three bits return to the default value.
VI.2 - General Configuration Register 1
WDD
PMA
TRD
bit15
bit15
bit15
SBV
C15
Nu
: TOKEN LAUNCH
MBL AFAB SCL
C14
: Watch Dog Disable
: Priority Memory Access
: Token Ring Disable
Nu
When TL is set to 1 by the microprocessor, the token pulse is launched from the TRO pin (Token
Ring Output pin). This pulse is provided to the TRI pin (Token Ring Input pin) of the next circuit
in the applications where several Multi-HDLC s are connected to the same shared memory.
When the bit 1 (WDR) of this register is set to 1 by the microprocessor, the watchdog counter is
reset.
When the bit 2 (RSS) of this register is set to 1 by the microprocessor, the circuit is reset (Same
action as reset pin).
WDD = 1, the Watch Dog is masked: WDO pin stays at “0”.
WDD = 0, the Watch Dog generates an “1” on WDO pin if the microprocessor has not reset the
Watch Dog during the duration programmed in Timer Register.
PMA = 1, if the token ring has been launched it is captured and kept in order to authorize mem-
ory accesses.
PMA = 0, memory is accessible only if the token is present; after one memory access the token
is re-launched from TRO pin of the current circuit to TRI pin of the next circuit.
TRD = 1, if the token has been launched, the token ring is stopped and destroyed; memory ac-
cesses are not possible. The token will not appear on TRO pin.
TRD = 0, the token ring is authorized; when the token will be launched, it will appear on TRO
pin.
C13
Nu
C12
Nu
BSEL SELB CSD
C11
Nu
H
for the first sample.
C10
Nu
C9
Nu
After reset (0000)
HCL SYN1 SYN0
bit8
bit8
bit8
C8
Nu
bit7
bit7
bit7
C7
Nu
H
C6
Nu
C5
Nu
D7
EVM
C4
Nu
TSV
C3
Nu
RSS
TRD
C2
STLC5466
GCR1 (02)
WDR
PMA
IDCR (00)
C1
31/130
WDD
bit0
bit0
bit0
C0
TL
H
H

Related parts for STLC5466