XC3SD3400A-4CSG484LI Xilinx Inc, XC3SD3400A-4CSG484LI Datasheet - Page 40
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XC3SD3400A-4CSG484LI
Manufacturer Part Number
XC3SD3400A-4CSG484LI
Description
FPGA Spartan®-3A Family 3.4M Gates 53712 Cells 667MHz 90nm Technology 1.2V 484-Pin BGA
Manufacturer
Xilinx Inc
Series
Spartan™-3A DSPr
Datasheet
1.XC3SD3400A-4FGG676C.pdf
(101 pages)
Specifications of XC3SD3400A-4CSG484LI
Package
484BGA
Family Name
Spartan®-3A
Device Logic Units
53712
Device System Gates
3400000
Maximum Internal Frequency
667 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
309
Ram Bits
2322432
Package / Case
484-CSBGA
Mounting Type
Surface Mount
Voltage - Supply
1.1 V ~ 3.6 V
Operating Temperature
-40°C ~ 100°C
Number Of I /o
309
Number Of Logic Elements/cells
5968
Number Of Gates
3400000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3SD3400A-4CSG484LI
Manufacturer:
XILINX
Quantity:
108
Company:
Part Number:
XC3SD3400A-4CSG484LI
Manufacturer:
Xilinx Inc
Quantity:
10 000
Clock Buffer/Multiplexer Switching Characteristics
Table 32: Clock Distribution Switching Characteristics
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
T
T
F
GIO
GSI
BUFG
Symbol
The numbers in this table are based on the operating conditions set forth in
Global clock buffer (BUFG, BUFGMUX, BUFGCE) I input to
O-output delay
Global clock multiplexer (BUFGMUX) select S-input setup to I0 and
I1 inputs. Same as BUFGCE enable CE-input
Frequency of signals distributed on global buffers (all sides)
Description
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
www.xilinx.com
Table
7.
Minimum
–
–
0
0.22
0.56
350
-5
Speed Grade
Maximum
0.23
0.63
334
-4
Units
MHz
ns
ns
40