XC3S200AN-4FT256C Xilinx Inc, XC3S200AN-4FT256C Datasheet - Page 23

• Manufacturer Part Number: XC3S200AN-4FT256C
• Description: FPGA Spartan®-3AN Family 200K Gates 4032 Cells 667MHz 90nm Technology 1.2V 256-Pin FTBGA
• Manufacturer: Xilinx Inc

Specifications of XC3S200AN-4FT256C

• Package: 256FTBGA
• Family Name: Spartan®-3AN
• Device Logic Units: 4032
• Device System Gates: 200000
• Maximum Internal Frequency: 667 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 195
• Ram Bits: 294912

Device DNA Read Endurance
Table 17: Device DNA Identifier Memory Characteristics
In-System Flash Memory Data Retention, Program/Write Endurance
Table 18: In-System Flash (ISF) Memory Characteristics
DS557 (v4.1) April 1, 2011
Product Specification
Notes:
1.
ISF_PAGE_REWRITE
ISF_PAGE_CYCLES
ISF_SPR_CYCLES
ISF_SEC_CYCLES
ISF_RETENTION
DNA_CYCLES
Minimum value at which functionality is still guaranteed. Do not exceed these values.
ISF_ACTIVE
Symbol
Symbol
Number of READ operations or JTAG ISC_DNA read operations. Unaffected by
HOLD or SHIFT operations
Data retention
Time that the ISF memory is selected and active. SPI_ACCESS design primitive
pins CSB = Low, CLK toggling
Number of program/erase cycles, per ISF memory page
Number of cumulative random (non-sequential) page erase/program operations
within a sector before pages must be rewritten
Number of program/erase cycles for Sector Protection Register
Number of program cycles for Sector Lockdown Register per sector,
user-programmable field in Security Register, and Power-of-2 Page Size
Description
Description
www.xilinx.com
Spartan-3AN FPGA Family: DC and Switching Characteristics
Minimum
30,000,000
Minimum
100,000
10,000
10,000
20
2
1
(1)
Cycles
Cycles
Cycles
cycles
Units
Units
Years
Years
Cycle
Read
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