XC3S200AN-4FT256C Xilinx Inc, XC3S200AN-4FT256C Datasheet - Page 105

• Manufacturer Part Number: XC3S200AN-4FT256C
• Description: FPGA Spartan®-3AN Family 200K Gates 4032 Cells 667MHz 90nm Technology 1.2V 256-Pin FTBGA
• Manufacturer: Xilinx Inc

Specifications of XC3S200AN-4FT256C

• Package: 256FTBGA
• Family Name: Spartan®-3AN
• Device Logic Units: 4032
• Device System Gates: 200000
• Maximum Internal Frequency: 667 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 195
• Ram Bits: 294912

Table 78: Spartan-3AN FGG484 Pinout (Cont’d)
DS557 (v4.1) April 1, 2011
Product Specification
Bank
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
IP_L04N_3/VREF_3
IP_L04P_3
IP_L11N_3
IP_L11P_3
IP_L15N_3/VREF_3
IP_L15P_3
IP_L19N_3
IP_L19P_3
IP_L23N_3
IP_L23P_3
IP_L27N_3
IP_L27P_3
IP_L31N_3
IP_L31P_3
IP_L35N_3
IP_L35P_3
IP_L39N_3
IP_L39P_3
IP_L46N_3/VREF_3
IP_L46P_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Pin Name
FGG484
AA11
AA16
AB22
AA7
AB1
Ball
A22
B12
B16
C20
D14
M8
M6
M7
H7
H8
K8
K7
N9
N8
N5
N6
P8
N7
R8
P7
T6
R7
E2
N2
P6
V2
A1
B7
C3
D9
J7
L8
L7
J2
J6
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VREF
VREF
VREF
Type
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
www.xilinx.com
Table 78: Spartan-3AN FGG484 Pinout (Cont’d)
VCCAUX SUSPEND
Bank
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Spartan-3AN FPGA Family: Pinout Descriptions
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Pin Name
FGG484
W10
W14
G21
M10
M12
M14
M21
Ball
K10
K12
N11
N13
P10
P14
P19
U17
Y20
U18
F11
F17
J11
J13
J14
J19
L11
L13
L17
T12
T21
G2
P4
P9
U6
Y3
F6
J4
J9
L2
L6
L9
T2
PWR MGMT
Type
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
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