MT48H8M32LFB5-75 IT:H Micron Technology Inc, MT48H8M32LFB5-75 IT:H Datasheet - Page 48

• Manufacturer Part Number: MT48H8M32LFB5-75 IT:H
• Description: DRAM Chip Mobile SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M32LFB5-75 IT:H

• Density: 256 Mb
• Maximum Clock Rate: 133 MHz
• Package: 90VFBGA
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 1.8 V
• Maximum Random Access Time: 8|6 ns
• Operating Temperature: -40 to 85 °C
• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Package / Case: 90-VFBGA
• Organization: 8Mx32
• Address Bus: 14b
• Access Time (max): 8/6ns
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 100mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 13:
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
256mb_x16_sdram_y36m_1.fm - Rev G 6/09 EN
Parameter/Condition
Operating current:
Active mode; BL = 1; READ or WRITE;
Standby current:
Power-down mode; All banks idle; CKE = LOW
Precharge nonpower-down standby current with clock stopped: All
banks idle; CKE is LOW, CS is HIGH; CK = LOW, CK# = HIGH; Address and
control inputs are switching; Data bus inputs are stable
Standby current:
Non-power-down mode; All banks idle; CKE = HIGH
Precharge nonpower-down standby current with clock stopped: All
banks idle; CKE is LOW, CS is HIGH; CK = LOW, CK# = HIGH; Address and
control inputs are switching; Data bus inputs are stable
Standby current:
Active mode; CKE = LOW; CS# = HIGH; All banks active; No accesses in
progress
Precharge nonpower-down standby current with clock stopped: All
banks idle; CKE is LOW, CS is HIGH; CK = LOW, CK# = HIGH; Address and
control inputs are switching; Data bus inputs are stable
Standby current:
Active mode; CKE = HIGH; CS# = HIGH; All banks active after
No accesses in progress
Precharge nonpower-down standby current with clock stopped: All
banks idle; CKE is LOW, CS is HIGH; CK = LOW, CK# = HIGH; Address and
control inputs are switching; Data bus inputs are stable
Operating current:
Burst mode; READ or WRITE; All banks active, half DQs toggling every
cycle
Auto refresh current:
CKE = HIGH; CS# = HIGH
Deep power-down
I
Notes: 1, 5, 6, 11, 13; notes appear on page 52 and 53; V
DD
Specifications and Conditions (x16)
t
RC =
t
RC (MIN)
t
t
RFC =
RFC = 7.8125µs
t
RFC (MIN)
48
t
RCD met;
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
/V
low-power
low-power
standard
standard
DDQ
Symbol
I
I
I
I
I
I
I
I
I
DD2NS
I
DD3NS
DD2PS
DD2PS
DD3PS
I
DD2N
DD3N
I
I
I
DD2P
DD2P
DD3P
DD1
DD4
DD5
DD6
I
256Mb: x16, x32 Mobile SDRAM
ZZ
= 1.7–1.95V
300
220
300
220
100
-75
65
20
25
10
90
10
Electrical Specifications
5
5
3
5
Max
©2006 Micron Technology, Inc. All rights reserved.
300
220
300
220
60
20
25
10
85
95
10
-8
5
5
3
5
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
Notes
18 19,
29, 30
1, 18,
1, 18,
1, 18,
1, 12,
1, 12,
1, 18,
1, 12,
19
19
19
30
30
19
19
19
26