TMC2192KHC Fairchild Semiconductor, TMC2192KHC Datasheet

Video ICs

TMC2192KHC

Manufacturer Part Number
TMC2192KHC
Description
Video ICs
Manufacturer
Fairchild Semiconductor
Type
Encoderr
Datasheet

Specifications of TMC2192KHC

Operating Supply Voltage
- 0.5 V to + 7 V
Supply Current
375 mA
Maximum Operating Temperature
70 C
Package / Case
MQFP-100
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
TMC2192KHC
Manufacturer:
PHI
Quantity:
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Part Number:
TMC2192KHC
Manufacturer:
FAIR
Quantity:
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Part Number:
TMC2192KHC
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Quantity:
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Features
• Multiple input formats
• Synchronization modes
• Subcarrier modes
• Ancillary Data Control (ANC)
• Pixel rates from 10 MHz to 15 MHz
• Programmable horizontal timing
• Programmable vertical blanking interval (VBI)
• Line-by-line pedestal enable
• Programmable pedestal height from -20 IRE to 20 IRE
• Programmable burst amplitude and phase
• Controlled edge rates for
Block Diagram
TMC2192
10 Bit Encoder
– 20 bit CCIR601
– 10 bit CCIR656
– 10 bit Digital Composite
– Master
– Slave
– Genlock
– CCIR656
– Free-run
– Subcarrier reset
– Genlock
– DRS-lock
– Sync
– Burst
– Active video
PD[23:0]
OL[4:0]
CVBS[9:0]
KEY
PROCESSER
PRE-
OVERLAY
FVHGEN
MIXER
y
cb
cr
CC
Adjustment
INSERT
Gain
SYNC
Y
• Programmable color space matrix
• 8:8:8 video reconstruction
• Three 10 bit D/A’s with independent trim
• Individual power down modes for each D/A
• Multiple output formats
• Pin-driven and data-driven, window keying
• Closed Caption waveform generation (13.5 MHz only)
• Sin(X)/X compensation filter
• 5 bit VBI line counter
• 3 bit field counter
• Internal test pattern generation
Applications
• Broadcast Television
• Nonlinear Video Processing
U
V
– S-video
– Composite
– Digital composite output
– 100% Color Bars
– 75% Color Bars
– Modulated Ramp
Chroma
Modulator
MPU
+
KEY
MIX
INTERP.
INTERP.
INTERP.
www.fairchildsemi.com
2194001a
DAC
REF.
C BYP
LUMA
R REF
C BYP
CHROMA
R REF
C BYP
COMPOSITE
R REF
REV. 1.0.0 8/13/03
CHROMA
COMP
LUMA
LUMA
LUMA
COMP

Related parts for TMC2192KHC

TMC2192KHC Summary of contents

Page 1

TMC2192 10 Bit Encoder Features • Multiple input formats – 20 bit CCIR601 – 10 bit CCIR656 – 10 bit Digital Composite • Synchronization modes – Master – Slave – Genlock – CCIR656 • Subcarrier modes – Free-run – Subcarrier ...

Page 2

TMC2192 Table of Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Applications ...

Page 3

PRODUCT SPECIFICATION List of Figures Figure 1. Input Formats . . . . . . . . . . . . . . . . . . . . . .7 Figure 2. 24 bit Input Format . . . ...

Page 4

TMC2192 Pin Assignments 100 65-6294-14 Pin Definitions Pin Name Pin Number CLOCK, SYNC, & CONTROL INPUTS (6 pins) DCVEN 57 HSIN 56 KEY 20 4 Pin Function Pin DDA 80 2 COMP ...

Page 5

PRODUCT SPECIFICATION Pin Definitions (continued) Pin Name Pin Number PXCK 95 RESET 94 VSIN 55 SYNC & CONTROL OUTPUTS (11 pins) FLD[2:0] 81–83 HSOUT 74 LINE[4:0] 76–80 PDC 73 VSOUT 75 DATA INPUTS (39 pins) CVBS[9:0] 84–93 OL[4:0] 21–25 PD[23:0] ...

Page 6

TMC2192 Pin Definitions (continued) Pin Name Pin Number ANALOG INTERFACE – Support (9 pins BYPLUMA C 6 BYPCHROM C 3 BYPCOMP R 13 REFLUMA R 8 REFCHROM R 99 REFCOMP V 98 REF MPU INTERFACE (13 pins) A[1:0]/S ...

Page 7

PRODUCT SPECIFICATION Functional Description Input Formats Control Registers for this section Address Bit(s) Name 0x05 7 D1OFF 0x05 6-4 INMODE 0x06 0 TSOUT The TMC2192 supports YC C component sources on the B R pixel data port input ...

Page 8

TMC2192 PXCK PD[23:14] B718 718 R718 719 EAV HSOUT (TSOUT = (SY+BR+BU+CBP+AV)*2 PXCK PD[23:14 n+1 HSIN HSOUT (TSOUT = 1) 3. INMODE = ...

Page 9

PRODUCT SPECIFICATION Color Space Matrix Control Registers for this section Address Bit(s) Name 0x30 7-0 MCF1L 0x33 7-0 MCF2L 0x35 7-0 MCF3L 0x3A 7-4 MCF1M 0x3B 2-0 MCF2M 0x3C 2-0 MCF3M Table 1. CSM Coefficient Range Coefficient Gain Range MCF1 ...

Page 10

TMC2192 Synchronization Modes Control Registers for this section Address Bit(s) Name 0x06 5-3 MODE 0x06 1 TOUT 0x06 0 TSOUT The TMC2192 offers a variety of synchronization modes; these are master, slave, genlock, 656 mode, and DRS-Lock. In master mode, ...

Page 11

PRODUCT SPECIFICATION Blanking Control Control Registers for this section Address Bit(s) Name 0x04 1-0 PDRM 0x06 2 PDCDIR 0x18 4-0 VBIENF1 0x19 4-0 VBIENF2 0x1F 7-0 PDCCNT The content of VBIENFx[4:0] selects the first line to contain an active video ...

Page 12

TMC2192 Horizontal Programming Control registers for this section Address Bit(s) 0x06 7-6 FORMAT 0x19 7 SHORT 0x19 6 T512 0x19 5 HALFEN 0x20 7-0 SY 0x21 7-0 BR 0x22 7-0 BU 0x23 7-0 CBP 0x24 7-0 XBP 0x25 7-0 VA ...

Page 13

PRODUCT SPECIFICATION SY Table 5. Horizontal Timing Specifications NTSC-M PAL-I Parameter ( 1.5 1.65 SY 4.7 4.7 BR 0.6 0.9 BU 2.5 2.25 CBP 1.6 2.55 VA 52.6556 51.95 H 63.5556 64.0 Vertical interval timing is ...

Page 14

TMC2192 SY SY Table 6. Vertical Interval Timing Specifications NTSC-M PAL-I Parameter ( 63.5556 64 EH 29.4778 29.65 EL 2.3 2.35 SH 4.7 4.7 SL 27.1 27 XBP Figure 10. Horizontal Timing ...

Page 15

PRODUCT SPECIFICATION Table 7. Default Horizontal Timing Parameters Field Horizontal Pixel Rate Freq. Rate Standard (Hz) (KHz) (Mpps) NTSC sqr. pixel 59.94 15.734266 12.27 NTSC CCIR-601 59.94 15.734266 13.50 NTSC 4x F 59.94 15.734266 14.32 SC PAL sqr. pixel 50.00 ...

Page 16

TMC2192 Table 8. NTSC Field/Line Sequence and Identification Field 1 FIELD ID = x00 Line ID LTYPE Line 266 267 268 269 270 9 EE ...

Page 17

PRODUCT SPECIFICATION 622 623 FIELDS 1 AND 5 624 625 1 UVV - HSOUT VSOUT (TOUT = 1) VSOUT (TOUT = 0) 309 310 FIELDS 2 AND 6 311 312 313 UVV - HSOUT ...

Page 18

TMC2192 Table 9. PAL Field/Line Sequence and Identification Field 1 & 5 FIELD ID = 000, 100 FIELD ID = 001, 111 Line ID LTYPE Line 313 314 315 4 EE ...

Page 19

PRODUCT SPECIFICATION 521 522 523 524 525 UVV UVV HSOUT VSOUT (TOUT = 1) VSOUT (TOUT = 0) 259 260 261 262 UVV - HSOUT VSOUT (TOUT = 1) VSOUT (TOUT = 0) 521 522 ...

Page 20

TMC2192 Table 10. PAL-M Field/Line Sequence and Identification Field 1 & 5 FIELD ID = 000, 100 FIELD ID = 001, 111 Line ID LTYPE Line 263 264 265 4 EE ...

Page 21

PRODUCT SPECIFICATION Chrominance Processor Control registers for this section: Address Bit(s) Name 0x06 7-6 FORMAT 0x06 5-3 MODE 0x07 5 DDSRST 0x11 7 DRSSEL 0x18 6 GLKCTL1 0x18 5 GLKCTL0 0x3F 3 GAUSS_BYP 0x40 7-0 FREQL 0x41 7-0 FREQ3 0x42 ...

Page 22

TMC2192 Table 11. Standard Subcarrier Parameters Field Horizontal Pixel Rate Freq. Rate Standard (Hz) (kHz) (Mpps) NTSC sqr. pixel 59.94 15.734266 12.27 NTSC CCIR-601 59.94 15.734266 13.50 NTSC 4x F 59.94 15.734266 14.32 SC PAL sqr. pixel 50.00 15.625000 14.75 ...

Page 23

PRODUCT SPECIFICATION Burst Envelope The TMC2192 includes the ability to adjust the burst ampli- tude and the shape of the burst. The Control Registers BRSTFULL, BRST1 and BRST2 hold the magnitude of the burst vector. BRSTFULL is the maximum amplitude ...

Page 24

TMC2192 Enabling the pedestal on line 25 enables it for the remainder of field 1, to line 262. Likewise, enabling the pedestal on line 288 enables it for the remainder of field 2. Pedestal Height PEDHGT1 determines the height of ...

Page 25

PRODUCT SPECIFICATION Interpolation Filters Each video output on the TMC2192 is digitally filtered with sharp-cutoff low-pass interpolation filters. These filters ensure that the frequency band above base-band video and below the pixel frequency ( /4, where f ...

Page 26

TMC2192 Analog outputs of the TMC2192 are driven by three 10 bit D/A converters, operating at twice the pixel rate. The outputs drive standard video levels into 37 Ohm loads. An internal voltage reference is used to provide ...

Page 27

PRODUCT SPECIFICATION Table 15. Ancillary Data Control – Phase ANCPHEN PHV Description 0 x Ignore ancillary phase data, set PHASE = Ignore ancillary phase data, no change to PHASE 1 1 Load ancillary phase data into PHASE ...

Page 28

TMC2192 Layering Engine Control Registers for this section Address Bit(s) Name 0x04 2 SKEN 0x05 3-2 OMIX 0x07 6 SKFLIP 0x09 7 HKEN 0x09 6 BUKEN 0x09 5 SKEXT 0x09 4 DKDIS 0x09 3 EKDIS 0x09 2 FKDIS 0x09 1-0 ...

Page 29

PRODUCT SPECIFICATION relation to the PD port. Control register OMIX chooses among the following set of coefficients; either 0 1/8 1 switch between the PD port and the over- PDx ...

Page 30

TMC2192 In read mode, the address is accompanied by a HIGH on the R/W pin during a falling edge of CS. The data output pins low-impedance state t after CS falls. Valid data are DOZ present on ...

Page 31

PRODUCT SPECIFICATION Serial Control Port (R-Bus) In addition to the 12-wire parallel port, a 2-wire serial con- trol interface is provided, active when SER is LOW. Either port alone can control the entire chip four TMC2192 devices may ...

Page 32

TMC2192 sequence simply do not acknowledge (NOACK) the last byte received and the TMC2192 will terminate the sequence. A repeated start signal occurs when the master device driv- ing the serial interface generates a start signal without first SDA Bit ...

Page 33

PRODUCT SPECIFICATION Read from four consecutive control registers • Start signal • Slave Address byte (R/W bit = LOW) • Block Pointer (00) • Offset Pointer • Stop signal • Start signal Control Register Map Table 22. Control Register Map ...

Page 34

TMC2192 Table 22. Control Register Map (continued) Reg Bit Mnemonic Function VBI Ped Enable Registers 14 7-0 VBIPEDEM VBI Pedestal Enable, Even Fields 15 7-0 VBIPEDEL VBI Pedestal Enable, Even Fields 16 7-0 VBIPEDOM VBI Pedestal Enable, Odd Fields 17 ...

Page 35

PRODUCT SPECIFICATION Table 22. Control Register Map (continued) Reg Bit Mnemonic Function 38 7-0 Reserved Program Low 39 7-0 Reserved Program Low 3A 7-4 MCF1M Matrix Coefficient #1 3A 3-0 Reserved Program Low 3B 7-3 Reserved Set ...

Page 36

TMC2192 Control Register Definitions Part Identification Register (0x02 Reg Bit Name 02 7-0 PARTID0 Revision Identification Register (0x03 Reg Bit Name 03 7-0 REVID0 Gamma Filters Register (0x04 RESERVED RESERVED RESERVED Reg Bit Name ...

Page 37

PRODUCT SPECIFICATION Control Register Definitions Input Format Register (0x05 D10FF INMODE Reg Bit Name 05 7 D1OFF 05 6 Reserved 05 5-4 INMODE 05 3-2 OMIX 05 1-0 SOURCE REV. 1.0.0 8/13/03 (continued OMIX Description ...

Page 38

TMC2192 Control Register Definitions General Control Register (0x06 FORMAT Reg Bit Name 06 7-6 FORMAT 06 5-3 MODE 06 2 PDCDIR 06 1 TOUT 06 0 TSOUT 38 (continued MODE Description Video Format. 00 NTSC ...

Page 39

PRODUCT SPECIFICATION Control Register Definitions Horizontal Ancillary Data Control Register (0x07 LDFID SKFLIP DDSRST Reg Bit Name 07 7 LDFID 07 6 SKFLIP 07 5 DDSRST RESERVED 07 4 ANCFREN 07 1 ANCPHEN 07 0 ...

Page 40

TMC2192 Control Register Definitions Keying/Overlay Engine Register (0x09 HKEN BUKEN SKEXT Reg Bit Name 09 7 HKEN 09 6 BUKEN 09 5 SKEXT 09 4 DKDIS 09 3 EKDIS 09 2 FKDIS 09 1-0 LAYMODE 40 (continued) 5 ...

Page 41

PRODUCT SPECIFICATION Control Register Definitions Key Value Register (0x0A Reg Bit Name 0A 7-0 DKEYMAX Key Value Register (0x0B Reg Bit Name 0B 7-0 DKEYMIN Key Value Register (0x0C Reg Bit ...

Page 42

TMC2192 Control Register Definitions Key Value Register (0x0E Reg Bit Name 0E 7-0 FKEYMAX Key Value Register (0x0F Reg Bit Name 0F 7-0 FKEYMIN 42 (continued FKEYMAX Description C Maximum Data Key Value. ...

Page 43

PRODUCT SPECIFICATION Control Register Definitions DAC Control Register (0x10 COMPDIS CHROMADIS LUMADIS Reg Bit Name 10 7 COMPDIS 10 6 CHROMADIS 10 5 LUMADIS 10 4-3 RESERVED 10 2 OLUTDIS RESERVED 10 1-0 REV. 1.0.0 8/13/03 (continued) ...

Page 44

TMC2192 Control Register Definitions DAC Control Register (0x11 DRSSEL RESERVED COMP2DB Reg Bit Name 11 7 DRSSEL RESERVED COMP2DB SINEN RESERVED LUMDIS 11 1 CHRMDIS 11 0 BURSTDIS ...

Page 45

PRODUCT SPECIFICATION Control Register Definitions VBI Ped Enable Register (0x14 Reg Bit Name 14 7-0 VBIPEDEM VBI Ped Enable Register (0x15 Reg Bit Name 15 7-0 VBIPEDEL VBI Ped Enable Register (0x16 ...

Page 46

TMC2192 Control Register Definitions VBI Ped Enable Register (0x17 Reg Bit Name 17 7-1 VBIPEDOM 17 0 HVA Vertical Blanking Interval Enable Register (0x18 Reserved GLKCTL1 GLKCTL0 Reg Bit Name 18 7 Reserved 18 6 GLKCTL1 ...

Page 47

PRODUCT SPECIFICATION Control Register Definitions Vertical Blanking Interval Enable Register (0x19 SHORT T512 HALFEN Reg Bit Name 19 7 SHORT 19 6 T512 19 5 HALFEN 19 4-0 VBIENF2 Pedestal Height Register (0x1A Reserved ...

Page 48

TMC2192 Control Register Definitions Closed Caption Register (0x1D Reg Bit Name 1D 7-0 CCD2 Closed Caption Register (0x1E CCON CCRTS CCPAR Reg Bit Name 1E 7 CCON 1E 6 CCRTS 1E 5 CCPAR 1E 4 CCFLD ...

Page 49

PRODUCT SPECIFICATION Control Register Definitions Timing Register (0x20 Reg Bit Name 20 7-0 SY Timing Register (0x21 Reg Bit Name 21 7-0 BR Timing Register (0x22 Reg Bit Name 22 7-0 ...

Page 50

TMC2192 Control Register Definitions Timing Register (0x25 Reg Bit Name 25 7-0 VA Timing Register (0x26 Reg Bit Name 26 7-0 VC Timing Register (0x27 Reg Bit Name 27 7-0 VB Timing Register (0x28) ...

Page 51

PRODUCT SPECIFICATION Control Register Definitions Timing Register (0x29 Reg Bit Name 29 7-0 EH Timing Register (0x2A Reg Bit Name 2A 7-0 SL Timing Register (0x2B Reg Bit Name 2B 7-0 ...

Page 52

TMC2192 Control Register Definitions Timing Register (0x2D XBP Reg Bit Name 2D 7-6 XBP 1-0 VC Timing Register (0x2E FIELD Reg Bit Name 2E 7-5 FIELD 2E 4-0 LTYPE ...

Page 53

PRODUCT SPECIFICATION Control Register Definitions Color Space Matrix Register (0x31 Reg Bit Name 31 7-0 RESERVED Color Space Matrix Register (0x32 Reg Bit Name 32 7-0 RESERVED Color Space Matrix Register (0x33 ...

Page 54

TMC2192 Control Register Definitions Color Space Matrix Register (0x36 Reg Bit Name 36 7-0 RESERVED Color Space Matrix Register (0x37 Reg Bit Name 37 7-0 RESERVED Color Space Matrix Register (0x38 Reg Bit Name ...

Page 55

PRODUCT SPECIFICATION Control Register Definitions Color Space Matrix Register (0x3B MCF3M Reg Bit Name 3B 7-3 RESERVED 3B 2-0 MCF4M Color Space Matrix Register (0x3C MCF5M Reg Bit Name 3C 7-3 RESERVED 3C 2-0 ...

Page 56

TMC2192 Control Register Definitions Color Space Matrix Register (0x3F SEL_CLK RESERVED GAUSS_BYP Reg Bit Name 3F 7 SEL_PIX 3F 6 RESERVED 3F 5 GAUSS_BYP 3F 4 SEL_CLK 3F 3 C2DB_OFF 3F 2-0 RESERVED Subcarrier Register (0x40 ...

Page 57

PRODUCT SPECIFICATION Control Register Definitions Subcarrier Register (0x41 Reg Bit Name 41 7-0 FREQ3 Subcarrier Register (0x42 Reg Bit Name 42 7-0 FREQ2 Subcarrier Register (0x43 Reg Bit Name 43 7-0 ...

Page 58

TMC2192 Control Register Definitions Subcarrier Register (0x46 Reg Bit Name 46 7-0 BURPHL Subcarrier Register (0x47 Reg Bit Name 47 7-0 BURPHM Burst Height Register (0x48 Reg Bit Name 48 7-0 BRSTFULL Burst Height ...

Page 59

PRODUCT SPECIFICATION Control Register Definitions Subcarrier Register (0x4A Reg Bit Name 4A 7-0 BRST2 REV. 1.0.0 8/13/03 (continued BRST2 Description Burst Height – 2nd Intermediate Value. The 8 bit value assigned to U burst component ...

Page 60

TMC2192 Absolute Maximum Ratings Parameter Power Supply Voltage Digital Inputs 2 Applied Voltage 3,4 Forced Current Digital Outputs 2 Applied Voltage 3,4 Forced Current Short Circuit Duration (Single Output in HIGH state to GND) Analog Output Short Circuit Duration (Single ...

Page 61

PRODUCT SPECIFICATION Operating Conditions (continued) Parameter t Setup Time SP t Hold Time HP Parallel Microprocessor Interface t CS Pulse Width, LOW PWLCS t CS Pulse Width, HIGH PWHCS t Address Setup Time SA t Address Hold Time HA t ...

Page 62

TMC2192 Electrical Characteristics Symbol Parameter I Power Supply Current DD I Power Supply Current DDQ (D/A disabled) V Voltage Reference Output RO I Input Bias Current Input Current, Logic HIGH IH I Input Current, Logic LOW IL ...

Page 63

PRODUCT SPECIFICATION System Performance Characteristics Parameter RES D/A Converter Resolution E Integral Linearity Error LI E Differential Linearity Error LD (monotonic) E Gain Error G dp Differential Phase dg Differential Gain SKEW CHROMA to LUMA Output Skew PSRR Power Supply ...

Page 64

TMC2192 Layout Considerations Designing with high-performance mixed-signal circuits demands printed circuits with ground planes. Wire-wrap is not an option. Overall system performance is strongly influ- enced by the board layout. Capacitive coupling from digital to analog circuits may result in ...

Page 65

PRODUCT SPECIFICATION VDD 96 VDD 72 VDD 54 VDD 39 REV. 1.0.0 8/13/ Figure 30. Typical Layout TMC2192 AGND 100 AGND 14 AGND 9 AGND ...

Page 66

TMC2192 66 Figure 31. ST-163E Layout PRODUCT SPECIFICATION REV. 1.0.0 8/13/03 ...

Page 67

PRODUCT SPECIFICATION Output Low-Pass Filters The response at 5.0MHz typically varies < 0.25dB with supplies 8V. When operating in the 0dB gain Figure 32. Pass Band Figure 34. 2T Pulse REV. 1.0.0 8/13/03 mode, pin 6 must ...

Page 68

TMC2192 Mechanical Dimensions 100-Lead MQFP Inches Millimeters Symbol Min. Max. Min. A — .134 — A1 .010 — .25 A2 .100 .120 2.55 B .008 .015 .22 .009 C .005 .13 D .904 .923 22.95 23.45 D1 .783 .791 19.90 ...

Page 69

... A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect its safety or effectiveness. 2003 Fairchild Semiconductor Corporation PRODUCT SPECIFICATION Package Marking TMC2192KHC 8/13/03 0.0m 002 Stock#DS30002192 ...

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